This Si53208-EVB is designed to evaluate the jitter performance, power consumption and signal integrity of Si53208 device for PCIe Gen1/2/3/4 and SRIS. The evaluation board features jumpers and SMA connector for easy static configuration of the control inputs as well we providing a port for external equipment access.
For PCIe compliance report, please download Silicon Labs PCIe Clock Jitter tool.
The PCIe Clock Jitter Tool is designed to enable users to quickly and easily take jitter measurements for PCIe Gen1/2/3/4/5 and SRNS/SRIS. This software takes away all the guesswork of PCIe Gen1/2/3/4/5 and SRNS/SRIS jitter measurements and margins in board designs. This tool will provide you with accurate results in just a few clicks. This software tool is provided in an executable format to support various common input waveform file, like .csv, .wfm and .bin. The easy-to-use GUI and helpful tips guide users through each step. Release notes and other documentation are also included in the software package.
Please select at least one column.