Evaluation boards are available for PCIe clock generators, clock buffers, and zero-delay buffers. The EVB allows you to measure the jitter performance, power consumption, and signal integrity. The boards feature SMA connectors for robust low jitter signal integrity measurements.
The PCIe Clock Jitter Tool is designed to enable users to quickly and easily take jitter measurements for PCIe Gen1/2/3/4/5 and SRNS/SRIS. This software takes away all the guesswork of PCIe Gen1/2/3/4/5 and SRNS/SRIS jitter measurements and margins in board designs. This tool will provide you with accurate results in just a few clicks. This software tool is provided in an executable format to support various common input waveform file, like .csv, .wfm and .bin. The easy-to-use GUI and helpful tips guide users through each step. Release notes and other documentation are also included in the software package.
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