Silicon Labs Host Libraries
Data Structures | Macros
Dual Port Config definitions
CP201x Manufacturing Library

Data Structures

struct  PDUAL_PORT_CONFIG
 
struct  _DUAL_PORT_CONFIG
 CP2105 Dual Port Config Structure. Alias of this struct is DUAL_PORT_CONFIG. More...
 

Macros

#define PORT_RI_SCI_ON   0x0001
 CP2105 Define bit locations for DUAL_PORT_CONFIG.Mode DUAL_PORT_CONFIG.Reset_Latch and DUAL_PORT_CONFIG.Suspend_Latch. More...
 
#define PORT_DCD_SCI_ON   0x0002
 PORT_DCD_SCI_ON location. More...
 
#define PORT_DTR_SCI_ON   0x0004
 PORT_DTR_SCI_ON location. More...
 
#define PORT_DSR_SCI_ON   0x0008
 PORT_DSR_SCI_ON location. More...
 
#define PORT_TXD_SCI_ON   0x0010
 PORT_TXD_SCI_ON location. More...
 
#define PORT_RXD_SCI_ON   0x0020
 PORT_RXD_SCI_ON location. More...
 
#define PORT_RTS_SCI_ON   0x0040
 PORT_RTS_SCI_ON location. More...
 
#define PORT_CTS_SCI_ON   0x0080
 PORT_CTS_SCI_ON location. More...
 
#define PORT_GPIO_0_SCI_ON   0x0002
 PORT_GPIO_0_SCI_ON location. More...
 
#define PORT_GPIO_1_SCI_ON   0x0004
 PORT_GPIO_1_SCI_ON location. More...
 
#define PORT_GPIO_2_SCI_ON   0x0008
 PORT_GPIO_2_SCI_ON location. More...
 
#define PORT_SUSPEND_SCI_ON   0x0001
 Can't configure latch value. More...
 
#define PORT_RI_ECI_ON   0x0100
 PORT_RI_ECI_ON location. More...
 
#define PORT_DCD_ECI_ON   0x0200
 PORT_DCD_ECI_ON location. More...
 
#define PORT_DTR_ECI_ON   0x0400
 PORT_DTR_ECI_ON location. More...
 
#define PORT_DSR_ECI_ON   0x0800
 PORT_DSR_ECI_ON location. More...
 
#define PORT_TXD_ECI_ON   0x1000
 PORT_TXD_ECI_ON location. More...
 
#define PORT_RXD_ECI_ON   0x2000
 PORT_RXD_ECI_ON location. More...
 
#define PORT_RTS_ECI_ON   0x4000
 PORT_RTS_ECI_ON location. More...
 
#define PORT_CTS_ECI_ON   0x8000
 PORT_CTS_ECI_ON location. More...
 
#define PORT_GPIO_0_ECI_ON   0x0400
 PORT_GPIO_0_ECI_ON location. More...
 
#define PORT_GPIO_1_ECI_ON   0x0800
 PORT_GPIO_1_ECI_ON location. More...
 
#define PORT_SUSPEND_ECI_ON   0x0100
 Can't configure latch value. More...
 
#define EF_GPIO_0_TXLED_ECI   0x01
 CP2105 Define bit locations for DUAL_PORT_CONFIG.EnhancedFxn_ECI. More...
 
#define EF_GPIO_1_RXLED_ECI   0x02
 Under device control. More...
 
#define EF_GPIO_1_RS485_ECI   0x04
 Under device control. More...
 
#define EF_INVERT_SUSPEND_ECI   0x10
 RS485 Invert bit. More...
 
#define EF_DYNAMIC_SUSPEND_ECI   0x40
 For GPIO signals. More...
 
#define EF_GPIO_0_TXLED_SCI   0x01
 CP2105 Define bit locations for DUAL_PORT_CONFIG.EnhancedFxn_SCI. More...
 
#define EF_GPIO_1_RXLED_SCI   0x02
 Under device control. More...
 
#define EF_INVERT_SUSPEND_SCI   0x10
 RS485 Invert bit. More...
 
#define EF_DYNAMIC_SUSPEND_SCI   0x40
 For GPIO signals. More...
 
#define EF_WEAKPULLUP   0x10
 Weak Pull-up on. More...
 
#define EF_WEAKPULLUP   0x10
 Weak Pull-up on. More...
 

Detailed Description

Dual Port Config definitions see CP210x_GetDualPortConfig() and CP210x_SetDualPortConfig()

Data Structure Documentation

◆ DUAL_PORT_CONFIG

struct DUAL_PORT_CONFIG
Data Fields
unsigned char EnhancedFxn_Device Enhanced function of Device.
unsigned char EnhancedFxn_ECI Enhanced function of ECI port.
unsigned char EnhancedFxn_SCI Enhanced function of SCI port.
uint16_t Mode Push-Pull = 1, Open-Drain = 0.
uint16_t Reset_Latch Logic High = 1, Logic Low = =0.
uint16_t Suspend_Latch Logic High = 1, Logic Low = =0.

◆ _DUAL_PORT_CONFIG

struct _DUAL_PORT_CONFIG

CP2105 Dual Port Config Structure. Alias of this struct is DUAL_PORT_CONFIG.

Macro Definition Documentation

◆ EF_DYNAMIC_SUSPEND_ECI

#define EF_DYNAMIC_SUSPEND_ECI   0x40

For GPIO signals.

◆ EF_DYNAMIC_SUSPEND_SCI

#define EF_DYNAMIC_SUSPEND_SCI   0x40

For GPIO signals.

◆ EF_GPIO_0_TXLED_ECI

#define EF_GPIO_0_TXLED_ECI   0x01

CP2105 Define bit locations for DUAL_PORT_CONFIG.EnhancedFxn_ECI.

Under device control

◆ EF_GPIO_0_TXLED_SCI

#define EF_GPIO_0_TXLED_SCI   0x01

CP2105 Define bit locations for DUAL_PORT_CONFIG.EnhancedFxn_SCI.

Under device control

◆ EF_GPIO_1_RS485_ECI

#define EF_GPIO_1_RS485_ECI   0x04

Under device control.

◆ EF_GPIO_1_RXLED_ECI

#define EF_GPIO_1_RXLED_ECI   0x02

Under device control.

◆ EF_GPIO_1_RXLED_SCI

#define EF_GPIO_1_RXLED_SCI   0x02

Under device control.

◆ EF_INVERT_SUSPEND_ECI

#define EF_INVERT_SUSPEND_ECI   0x10

RS485 Invert bit.

◆ EF_INVERT_SUSPEND_SCI

#define EF_INVERT_SUSPEND_SCI   0x10

RS485 Invert bit.

◆ EF_WEAKPULLUP [1/2]

#define EF_WEAKPULLUP   0x10

Weak Pull-up on.

CP2105 Define bit locations for DUAL_PORT_CONFIG.EnhancedFxn_Device.

Weak Pull-up on

◆ EF_WEAKPULLUP [2/2]

#define EF_WEAKPULLUP   0x10

Weak Pull-up on.

CP2105 Define bit locations for DUAL_PORT_CONFIG.EnhancedFxn_Device.

Weak Pull-up on

◆ PORT_CTS_ECI_ON

#define PORT_CTS_ECI_ON   0x8000

PORT_CTS_ECI_ON location.

◆ PORT_CTS_SCI_ON

#define PORT_CTS_SCI_ON   0x0080

PORT_CTS_SCI_ON location.

◆ PORT_DCD_ECI_ON

#define PORT_DCD_ECI_ON   0x0200

PORT_DCD_ECI_ON location.

◆ PORT_DCD_SCI_ON

#define PORT_DCD_SCI_ON   0x0002

PORT_DCD_SCI_ON location.

◆ PORT_DSR_ECI_ON

#define PORT_DSR_ECI_ON   0x0800

PORT_DSR_ECI_ON location.

◆ PORT_DSR_SCI_ON

#define PORT_DSR_SCI_ON   0x0008

PORT_DSR_SCI_ON location.

◆ PORT_DTR_ECI_ON

#define PORT_DTR_ECI_ON   0x0400

PORT_DTR_ECI_ON location.

◆ PORT_DTR_SCI_ON

#define PORT_DTR_SCI_ON   0x0004

PORT_DTR_SCI_ON location.

◆ PORT_GPIO_0_ECI_ON

#define PORT_GPIO_0_ECI_ON   0x0400

PORT_GPIO_0_ECI_ON location.

◆ PORT_GPIO_0_SCI_ON

#define PORT_GPIO_0_SCI_ON   0x0002

PORT_GPIO_0_SCI_ON location.

◆ PORT_GPIO_1_ECI_ON

#define PORT_GPIO_1_ECI_ON   0x0800

PORT_GPIO_1_ECI_ON location.

◆ PORT_GPIO_1_SCI_ON

#define PORT_GPIO_1_SCI_ON   0x0004

PORT_GPIO_1_SCI_ON location.

◆ PORT_GPIO_2_SCI_ON

#define PORT_GPIO_2_SCI_ON   0x0008

PORT_GPIO_2_SCI_ON location.

◆ PORT_RI_ECI_ON

#define PORT_RI_ECI_ON   0x0100

PORT_RI_ECI_ON location.

◆ PORT_RI_SCI_ON

#define PORT_RI_SCI_ON   0x0001

CP2105 Define bit locations for DUAL_PORT_CONFIG.Mode DUAL_PORT_CONFIG.Reset_Latch and DUAL_PORT_CONFIG.Suspend_Latch.

PORT_RI_SCI_ON location

◆ PORT_RTS_ECI_ON

#define PORT_RTS_ECI_ON   0x4000

PORT_RTS_ECI_ON location.

◆ PORT_RTS_SCI_ON

#define PORT_RTS_SCI_ON   0x0040

PORT_RTS_SCI_ON location.

◆ PORT_RXD_ECI_ON

#define PORT_RXD_ECI_ON   0x2000

PORT_RXD_ECI_ON location.

◆ PORT_RXD_SCI_ON

#define PORT_RXD_SCI_ON   0x0020

PORT_RXD_SCI_ON location.

◆ PORT_SUSPEND_ECI_ON

#define PORT_SUSPEND_ECI_ON   0x0100

Can't configure latch value.

◆ PORT_SUSPEND_SCI_ON

#define PORT_SUSPEND_SCI_ON   0x0001

Can't configure latch value.

◆ PORT_TXD_ECI_ON

#define PORT_TXD_ECI_ON   0x1000

PORT_TXD_ECI_ON location.

◆ PORT_TXD_SCI_ON

#define PORT_TXD_SCI_ON   0x0010

PORT_TXD_SCI_ON location.