Macros | |
| #define | CP2110_MASK_GPIO_0_CLK 0x0001 |
| GPIO.0/CLK. More... | |
| #define | CP2110_MASK_GPIO_1_RTS 0x0002 |
| GPIO.1/RTS. More... | |
| #define | CP2110_MASK_GPIO_2_CTS 0x0004 |
| GPIO.2/CTS. More... | |
| #define | CP2110_MASK_GPIO_3_RS485 0x0008 |
| GPIO.3/RS485. More... | |
| #define | CP2110_MASK_TX 0x0010 |
| TX. More... | |
| #define | CP2110_MASK_RX 0x0020 |
| RX. More... | |
| #define | CP2110_MASK_GPIO_4_TX_TOGGLE 0x0040 |
| TX Toggle. More... | |
| #define | CP2110_MASK_GPIO_5_RX_TOGGLE 0x0080 |
| RX Toggle. More... | |
| #define | CP2110_MASK_SUSPEND_BAR 0x0100 |
| /Suspend More... | |
| #define | CP2110_MASK_NA 0x0200 |
| N/A, unused. More... | |
| #define | CP2110_MASK_GPIO_6 0x0400 |
| GPIO.6. More... | |
| #define | CP2110_MASK_GPIO_7 0x0800 |
| GPIO.7. More... | |
| #define | CP2110_MASK_GPIO_8 0x1000 |
| GPIO.8. More... | |
| #define | CP2110_MASK_GPIO_9 0x2000 |
| GPIO.9. More... | |
| #define | CP2110_MASK_SUSPEND 0x4000 |
| Suspend. More... | |
| #define | CP2110_MASK_NAII 0x8000 |
| N/A, unused. More... | |
Pin Bitmasks for Suspend
| #define CP2110_MASK_GPIO_0_CLK 0x0001 |
GPIO.0/CLK.
| #define CP2110_MASK_GPIO_1_RTS 0x0002 |
GPIO.1/RTS.
| #define CP2110_MASK_GPIO_2_CTS 0x0004 |
GPIO.2/CTS.
| #define CP2110_MASK_GPIO_3_RS485 0x0008 |
GPIO.3/RS485.
| #define CP2110_MASK_GPIO_4_TX_TOGGLE 0x0040 |
TX Toggle.
| #define CP2110_MASK_GPIO_5_RX_TOGGLE 0x0080 |
RX Toggle.
| #define CP2110_MASK_GPIO_6 0x0400 |
GPIO.6.
| #define CP2110_MASK_GPIO_7 0x0800 |
GPIO.7.
| #define CP2110_MASK_GPIO_8 0x1000 |
GPIO.8.
| #define CP2110_MASK_GPIO_9 0x2000 |
GPIO.9.
| #define CP2110_MASK_NA 0x0200 |
N/A, unused.
| #define CP2110_MASK_NAII 0x8000 |
N/A, unused.
| #define CP2110_MASK_RX 0x0020 |
RX.
| #define CP2110_MASK_SUSPEND 0x4000 |
Suspend.
| #define CP2110_MASK_SUSPEND_BAR 0x0100 |
/Suspend
| #define CP2110_MASK_TX 0x0010 |
TX.