C8051F7xx Capacitive Touch Sense MCUs

The C8051F7​xx family of high pin-count capacitive touch sense microcontroller (MCU) devices for cost-sensitive, high I/O embedded systems offer a patent-pending touch sensing feature that is robust, accurate, responsive and easy to configure. Offering up to 54 general purpose I/O pins and a 25 MIPS 8051 CPU, the C8051F7xx family of microcontrollers brings a high level of processing power and flexibility to applications such as industrial controls, security systems, residential HVAC, home appliances, keyboards, cash machines and fax/printer/scanner front panels.

With on-chip power-on reset, VDD monitor, watchdog timer and a clock oscillator, the C8051F70x/71x devices are truly stand-alone, system-on-a-chip solutions. The Flash memory can be reprogrammed even in-circuit, providing non-volatile data storage, and also allowing field upgrades of the 8051 firmware. User software has complete control of all peripherals, and may individually shut down any or all peripherals for power savings.

 

Capacitive touch channels
39
Core Frequency
25 MHz

C8051F7xx Common Specs

  • High-speed pipelined 8051-compatible microcontroller core (up to 25 MIPS)
  • In-system, full-speed, non-intrusive debug interface (on-chip)
  • 10-bit 500 ksps Single-ended ADC
  • Precision calibrated 24.5 MHz internal oscillator
  • 16 kB of on-chip Flash memory
  • 512 bytes of on-chip RAM
  • Implemented SMBus/I²C, UART and SPI serial interfaces
  • Four general-purpose 16-bit timers
  • Capacitive Sense interface with 32 input channels
  • Programmable Counter/Timer Array (PCA)
  • On-chip internal voltage reference
  • On-chip watchdog timer
  • On-chip power-on reset and supply monitor
  • On-chip voltage comparator
  • 54 general purpose I/O
Status
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Part Number MCU Core MHz Flash (kB) RAM (kB) Dig I/O Pins 5 Volt Tolerant ADC 1 USB Temp Sensor Timers (16-bit) PCA Channels ADC 2 DAC Comparators UART SPI I2C HS I2C Slave I2S EMIF CAN LIN AES AEC-Q100 Vdd (min) Vdd (max) Package Type Package Size (mm) Internal Osc. VREF Debug Interface Temperature (ºC)
8051 25 15 0.5 39 10-bit, 12-ch., 500 ksps 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFN48 7x7 ±2 C2 -40 85
8051 25 15 0.5 39 10-bit, 12-ch., 500 ksps 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFP48 7x7 ±2 C2 -40 85
8051 25 15 0.5 39 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFN48 7x7 ±2 C2 -40 85
8051 25 15 0.5 39 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFP48 7x7 ±2 C2
8051 25 16 0.5 39 10-bit, 12-ch., 500 ksps 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFN48 7x7 ±2 C2 -40 85
8051 25 16 0.5 39 10-bit, 12-ch., 500 ksps 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFP48 7x7 ±2 C2 -40 85
8051 25 16 0.5 39 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFN48 7x7 ±2 C2 -40 85
8051 25 16 0.5 39 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFP48 7x7 ±2 C2 -40 85
8051 25 8 0.5 39 10-bit, 12-ch., 500 ksps 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFN48 7x7 ±2 C2 -40 85
8051 25 8 0.5 39 10-bit, 12-ch., 500 ksps 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFP48 7x7 ±2 C2 -40 85
8051 25 8 0.5 39 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFN48 7x7 ±2 C2 -40 85
8051 25 8 0.5 39 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFP48 7x7 ±2 C2 -40 85
8051 25 8 0.5 39 10-bit, 12-ch., 500 ksps 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFN48 7x7 ±2 C2 -40 85
8051 25 8 0.5 39 10-bit, 12-ch., 500 ksps 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFP48 7x7 ±2 C2 -40 85
8051 25 8 0.5 39 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFN48 7x7 ±2 C2 -40 85
8051 25 8 0.5 39 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFP48 7x7 ±2 C2 -40 85
8051 25 16 0.5 29 10-bit, 3-ch., 500 ksps 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFN32 5x5 ±2 C2 -40 85
8051 25 16 0.5 20 4 3 1 1 1 1 0 0 0 0 0 1.8 3.6 QFN24 4x4 ±2 C2 -40 85

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