Si53108 PCI Express Zero-Delay/Fanout Buffer Evaluation Kit

Si53108-EK

Evaluation boards are available for PCIe clock generatorsclock buffers, and zero-delay buffers. The EVB allows you to measure jitter performance, power consumption, and signal integrity. The boards feature SMA connectors for robust low jitter signal integrity measurements.

 

Features

Each evaluation kit includes one evaluation board and is designed to verify:

  • Performance and compliancy of PCI Express
  • Measure device power consumption
  • Connect to prototype systems that have SMA connectors, supporting robust, low jitter signal integrity measurements for system validation
  • Output enable (OE) pins for power management
  • Spread spectrum control pins for easy EMI control
  • Tweaks, verify, and understand I²C edge rate and skew controls for PCIe clocks

Additional Resources

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Si53108-EVB User's Guide

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Si53108 Data Sheet

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AN871: Driving Long PCIe Clock Lines

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AN874: Cascading Two Si53112 Buffers

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