Silicon Labs “Triple-Play Timing Solutions for 56G SerDes”

  • Ease the migration from 10G/28G to 56G
  • Sub-100fs RMS phase jitter performance maximizes design margin
  • Frequency flexible clocks integrate SerDes, CPU and system timing into single IC
  • Only timing supplier offering comprehensive clock and oscillator portfolio for 56G

Ultra-Series Crystal Oscillators

  • 200kHz - 3 GHz
  • 80fs RMS phase jitter
  • High reliability

Clock Generators

  • 12 outputs
  • 69fs RMS phase jitter
  • Any-frequency

Jitter Attenuating Clocks

  • 4 inputs, 12 outputs
  • 69fs RMS phase jitter
  • Hitless Reference Switching
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