Si5330G CMOS Zero Delay Clock Buffer

The Si5330G is a low skew, low jitter and low power Zero Delay Buffer (ZDB) designed to produce 8 clock outputs from 1 reference input(s) for high speed clock distribution applications. The product has an on-chip PLL which locks to the input clock at CLKIN and receives its feedback internally from the CLKOUT pin.

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Specifications Summary

Inputs: 1

Outputs: 8

Frequency Min (MHz): 5

Frequency Max (MHz): 200

Additive Jitter (ps): 0.15

Zero Delay Mode: No

Package Type: QFN24

Development Tools Type
Si5338 Clock Generator Development Kit Development Kits
Title Version Resource Type
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