Si53360-B-GT CMOS Zero Delay Clock Buffer

Clock Inputs

The Si53360-B-GT is a low skew, low jitter and low power Zero Delay Buffer (ZDB) designed to produce 8 clock outputs from 2 reference input(s) for high speed clock distribution applications. The product has an on-chip PLL which locks to the input clock at CLKIN and receives its feedback internally from the CLKOUT pin.

Similar Devices: SI53360-B-GT SI53365-B-GT

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Specifications Summary

Inputs: 2

Outputs: 8

Frequency Min (MHz): 1

Frequency Max (MHz): 200

Additive Jitter (ps): 0.1

Zero Delay Mode: No

Package Type: TSSOP16

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