SL23EP09 CMOS Zero Delay Clock Buffer

Note: This device is not recommended for new designs (NRND).

The SL23EP09 is a low skew, low jitter and low power Zero Delay Buffer (ZDB) designed to produce 9 clock outputs from 1 reference input(s) for high speed clock distribution applications. The product has an on-chip PLL which locks to the input clock at CLKIN and receives its feedback internally from the CLKOUT pin.

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Specifications Summary

Inputs: 1

Outputs: 9

Frequency Min (MHz): 10

Frequency Max (MHz): 220

Additive Jitter (ps):

Zero Delay Mode: Yes

Package Type: SOIC16; TSSOP16

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