PCIe Clock Buffers

Silicon Labs offers a portfolio of low-power fanout and zero-delay buffers meeting PCI-Express Gen1/2/3 specifications. All devices feature low-power, push-pull output buffer technology, providing benefits of low-power consumption, reduced external terminating resistors, and small packaging. Devices in this family are ideal for consumer, industrial, server, storage, and data center applications requiring a high number of PCI-Express clocks.



Features

  • Complete portfolio of PCI Express buffers/zero-delay buffers
  • Push-pull HCSL output buffer technology
  • Integrated termination resistors
  • Low-power consumption
  • All devices PCIe Gen 1/2/3 compliant with margin
  • Supports optional LVPECL, LVDS, or CML levels
  • -40 to 85 °C operation
  • Individual output enable control
  • Small form factor QFN packaging
  • Excellent PSRR
  • Intel Qualified (Si53108, Si53112)

Product Matrix

Devices
Part Number Data Sheet Dev KIt Clock Inputs Clock Outputs Frequency Min Frequency Max (MHz) Output Format(s) Additive Jitter (RMS) (ps) VDD (V) VDDO (V) Package Type Package Size (mm) Universal Buffers Differential Buffers LVCMOS Buffers PCI Express Buffers Zero Delay Buffers
Timing Kits 1 2 10 175 HCSL 0.2 2.5; 3.3 TDFN8 1.4x1.6 No No No Yes No
Timing Kits 1 2 10 175 HCSL 0.2 2.5; 3.3 TDFN8 1.4x1.6 No No No Yes No
Timing Kits 1 2 10 175 HCSL 0.2 2.5; 3.3 TDFN8 1.4x1.6 No No No Yes No
1 2 100 210 HCSL 0.1 3.3 3.3 QFN24 4x4 No No No Yes No
Timing Kits 1 4 100 210 HCSL 0.1 3.3 3.3 QFN24 4x4 No No No Yes No
1 6 100 210 HCSL 0.1 3.3 3.3 QFN32 5x5 No No No Yes No
Timing Kits 1 9 100 210 HCSL 0.1 3.3 3.3 QFN48 6x6 No No No Yes No

Evaluate PCIe Buffers

The easiest way to begin development with the Si531xx family is with one of the available Si5311x kits. The EVB allows you to measure the jitter performance, power consumption, and signal integrity. The boards feature SMA connectors for robust low jitter signal integrity measurements.

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