Si5350C-B-GM LVCMOS 8 Output Clock Generator

The Si5350C-B-GM LVCMOS Clock Generator supports 8 outputs and has a frequency output between 0.0025 and 200 MHz.

Similar Devices: SI5350C-B-GM SI5350C-B-GT

Specifications Summary

Reference Inputs: 2

Clock Outputs: 8

Phase Jitter (ps): 3.5

Input Frequency Min (MHz): 10

Input Frequency Max (MHz): 100

Output Frequency Min (MHz): 0.0025

Output Frequency Max (MHz): 200

Output Format(s): LVCMOS

Jitter Attenuator: No

PCI Express: No

Package Type: QFN20

Package Size (mm): 4x4

Development Tools	Type
Si5350/51 Any-Frequency CMOS Clock Generator + VCXO Development Kit	Development Kits

Title	Version	Resource Type
ClockBuilder Pro Software Installer	2.23	Software
Silicon Labs' Timing Solutions for Altera FPGAs by Application	1.0	Miscellaneous
How to Select the Right PLL-based Oscillator for Your Timing Application		White Papers
DSPLL & MultiSynth Clock Architecture Enables High-Density 10/40/100G Line Card Designs		White Papers
Addressing Timing Challenges in 6G-SDI Applications		White Papers
Timing ICs Keep Beat with Needs of Today’s Embedded Market	1.0	White Papers
Choosing the Optimal Internal or External Clocking Solution for FPGA-Based Designs		White Papers
When to Use a Clock vs an Oscillator	0.1	White Papers
When to Use a Clock vs. an Oscillator	1.0	White Papers
Reducing EMI and Improving Signal Integrity Using Spread Spectrum Clocking	1.0	White Papers
17061678-End-Of-Life-Notification-for-Legacy-Timing-Products		Product Change Notifications (PCN)
AN428 Jumpstart Software Ver 1.3	1.3	Software
AN491: Power Supply Rejection for Low Jitter Clocks	0.2	Application Notes
AN428: Jump Start: In-System, Flash-Based Programming for Silicon Labs’ Timing Products	0.6	Application Notes
AN377: Timing and Synchronization in Broadcast Video	0.1	Application Notes
Selecting the Optimum PCIe Clock Source	1.0	White Papers
Configurable Tiny Clocks Reduce Space, Power and EMI in Consumer Electronics Designs	1.0	White Papers
The Pros and Cons of Consolidating Frequency Sources Using Oscillators and Clock Generators	1.0	White Papers
CBPro Project File Inspector	1.0	Software
CBPro Project File Inspector README	1.0	Software
PB 1601121 Si53019-A01A Package Drawing Update in Data Sheet		Product Change Notifications (PCN)
PCI Express Solutions	2	Brochures
Timing Jitter Primer eBook	2	White Papers
Timing Jitter Tutorial and Measurement Guide (e-book)	1	White Papers
PB #1606031: Inner Box Label Change		Product Change Notifications (PCN)
AN699: FPGA Reference Clock Phase Jitter Specifications	0.1	Application Notes
Timing Solutions for Xilinx FPGAs		Miscellaneous
Timing Solutions for Cavium Processors		Miscellaneous
Timing Solutions for Marvell		Miscellaneous
Timing Solutions for NXP/Freescale Network Processors		Miscellaneous
Timing Solutions for Broadcom Switches/PHYs		Miscellaneous
Timing Solutions for Intel FPGAs		Miscellaneous
Timing Product Selector Guide		Brochures
Timing Software Version Information		Software
Standard Outerbox Label Change to Include RoHS and Halogen Free Mark		Product Change Notifications (PCN)
Si5350C-B Factory-Programmable Any-Frequency CMOS Clock Generator + PLL	1.0	Data Sheets
Si535x-B20QFN-EVB User's Guide	0.3	User Guides
Si5350 Timing ToolStick Quick-Start Guide	0.1	Quick Start Guides
AN619: Manually Generating an Si5351 Register Map	0.6	Application Notes
AN551: Crystal Selection Guide for Si5350/51 Devices	0.3	Application Notes
AN554: Si5350/51 PCB Layout Guide	0.3	Application Notes
SI5350B_MSOP CAD/CAE Schematic Footprints and Symbols		Schematic and Layout Files
SI5351B_QFN CAD/CAE Schematic Footprints and Symbols		Schematic and Layout Files
SI5351A_MSOP CAD/CAE Schematic Footprints and Symbols		Schematic and Layout Files
SI5350C_MSOP CAD/CAE Schematic Footprints and Symbols		Schematic and Layout Files
SI5350C_QFN CAD/CAE Schematic Footprints and Symbols		Schematic and Layout Files
SI5350A_MSOP CAD/CAE Schematic Footprints and Symbols		Schematic and Layout Files
SI5350B_QFN CAD/CAE Schematic Footprints and Symbols		Schematic and Layout Files
SI5350A_QFN CAD/CAE Schematic Footprints and Symbols		Schematic and Layout Files
SI5351A_QFN CAD/CAE Schematic Footprints and Symbols		Schematic and Layout Files
Glitch‐Free Frequency Shifting Simplifies Timing Design	0.2	White Papers

Si5350C-B-GM LVCMOS 8 Output Clock Generator

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