Si5334H Differential Clock Generator

Output Frequency Max (MHz)

The Si5334H 4 output differential clock generator is is capable of synthesizing 4 completely non-integer-related frequencies between 0.16 and 350 MHz. The device has four banks of outputs with each bank supporting one differential pair or two single-ended outputs. Using Silicon Labs' patented MultiSynth fractional divider technology, all outputs are guaranteed to have 0 ppm frequency synthesis error regardless of configuration, enabling the replacement of multiple clock ICs and crystal oscillators with a single device.

Similar Devices: SI5334G SI5334H SI5334J

View Datasheet for all specifications
Specifications Summary

Reference Inputs: 1

Clock Outputs: 4

Phase Jitter (ps): 1

Input Frequency Min (MHz): 5

Input Frequency Max (MHz): 710

Output Frequency Min (MHz): 0.16

Output Frequency Max (MHz): 350

Output Format(s): LVPECL; LVDS; LVCMOS; HCSL; SSTL; HSTL; CML

Jitter Attenuator: No

PCI Express: Yes

Package Type: QFN24

Package Size (mm): 4x4

Development Tools Type
Si5338 Clock Generator Development Kit Development Kits
Title Version Resource Type
Si5334 Data Sheet 1.3 Data Sheets
Silicon Labs' Timing Solutions for Xilinx FPGAs by Application 1.0 Miscellaneous
Silicon Labs' Timing Solutions for Altera FPGAs by Application 1.0 Miscellaneous
How to Select the Right PLL-based Oscillator for Your Timing Application White Papers
DSPLL & MultiSynth Clock Architecture Enables High-Density 10/40/100G Line Card Designs White Papers
Addressing Timing Challenges in 6G-SDI Applications White Papers
Timing ICs Keep Beat with Needs of Today’s Embedded Market 1.0 White Papers
Choosing the Optimal Internal or External Clocking Solution for FPGA-Based Designs White Papers
When to Use a Clock vs an Oscillator 0.1 White Papers
When to Use a Clock vs. an Oscillator 1.0 White Papers
Reducing EMI and Improving Signal Integrity Using Spread Spectrum Clocking 1.0 White Papers
1204091B_ClockBuilder Desktop Software v5.0.0 Availability-Silicon_Labs Product Change Notifications (PCN)
1107132 Si5330, Si5334, Si5338, Si5355, Si5356 Shipment Media Change std Product Change Notifications (PCN)
PB #1309172: Si5338 4 5 LVDS Rise Fall Time Product Change Notifications (PCN)
PB #1411142: Si5338-35-34-56 CMOS Output Impedance Product Change Notifications (PCN)
PB1309061 Si5338-4-5 rise fall time Product Change Notifications (PCN)
PB 1601121 Si53019-A01A Package Drawing Update in Data Sheet Product Change Notifications (PCN)
PB #1404151: ClockBuilder Desktop Software v6.3 Release Update Product Change Notifications (PCN)
Si5334H-Bxxxxx-GM IBIS Model 3.2 Software
Si5334H axxxxx IBIS Model 3.1 Software
AN408: Termination Options for Any-Frequency, Any Output Clock Generators and Clock Buffers 0.5 Application Notes
AN360: Crystal Selection Guide for Si533x and Si5355/56 Devices 0.5 Application Notes
Si5338-EVB User Guide 1.4 User Guides
PCI Express Solutions 2 Brochures
SI5334G_H_J CAD/CAE Schematic Footprints and Symbols Schematic and Layout Files
Si533x-EVB Schematics and Layout 1.0 Schematic and Layout Files
Simplify Timing Architectures with Flexible Clocks 041510 White Papers
Timing Jitter Primer eBook 2 White Papers
Timing Jitter Tutorial and Measurement Guide (e-book) 1 White Papers
Standard Outerbox Label Change to Include RoHS and Halogen Free Mark Product Change Notifications (PCN)
PB #1606031: Inner Box Label Change Product Change Notifications (PCN)
TimingSoftwareVersionInfo.xml Software
AN699: FPGA Reference Clock Phase Jitter Specifications 0.1 Application Notes
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