High Performance Jitter Attenuator, Jitter Cleaner Si5347B  

Package Type

Output Frequency Max (MHz)

Clock Outputs

The Si5347B 8 output, high performance jitter attenuator combines fourth-generation DSPLL and MultiSynth™ technologies to enable any-frequency clock generation and jitter attenuation for applications requiring the highest level of jitter performance. The device has a frequency output range up to 350 MHz and delivers a 0.09 ps rms phase jitter performance with a 0 ppm error. The loop filter is fully integrated on-chip, eliminating the risk of noise coupling associated with discrete solutions. Further, the jitter attenuation bandwidth is digitally programmable, providing jitter performance optimization at the application level. The Si5347B can be quickly and easily configured using ClockBuilder Pro software.

Similar Devices: SI5347A SI5347B SI5347C SI5347D

View Datasheet for all specifications View Datasheet for all specifications
Specifications Summary

Reference Inputs: 4

Clock Outputs: 8

Phase Jitter (fs): 0.09

Input Frequency Min (MHz): 0.008

Input Frequency Max (MHz): 750

Output Frequency Min (MHz): 0.0001

Output Frequency Max (MHz): 350

Output Format(s): CML; HCSL; LVCMOS; LVDS; LVPECL

Jitter Attenuator: Yes

PCI Express: No

Package Type: QFN64

Package Size (mm): 9x9

Development Tools Type
Si5347 Multi-PLL Jitter Attenuator Development Kit Evaluation Kits
Title Version Resource Type
Silicon Lab’s Si5348 Network Synchronizer with Marvell’s 100G 88X5123 PHY tested using the Calnex Paragon-100G ITU-T G.8262 Compliance Report Reference Designs
ClockBuilder Pro Software Installer 2.29 Software
Silicon Labs' Timing Solutions for Altera FPGAs by Application 1.0 Miscellaneous
How to Select the Right PLL-based Oscillator for Your Timing Application White Papers
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Choosing the Optimal Internal or External Clocking Solution for FPGA-Based Designs White Papers
When to Use a Clock vs an Oscillator 0.1 White Papers
When to Use a Clock vs. an Oscillator 1.0 White Papers
Reducing EMI and Improving Signal Integrity Using Spread Spectrum Clocking 1.0 White Papers
AN699: FPGA Reference Clock Phase Jitter Specifications 0.1 Application Notes
Standard Outerbox Label Change to Include RoHS and Halogen Free Mark Product Change Notifications (PCN)
Timing Solutions for Xilinx FPGAs Miscellaneous
Timing Solutions for Marvell Miscellaneous
Timing Solutions for NXP/Freescale Network Processors Miscellaneous
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Timing Solutions for Cavium Processors Miscellaneous
Timing Solutions for Intel FPGAs Miscellaneous
Timing Jitter Primer eBook 2 White Papers
Timing Jitter Tutorial and Measurement Guide (e-book) 1 White Papers
PB #1606031: Inner Box Label Change Product Change Notifications (PCN)
Timing Product Selector Guide Brochures
Timing Software Version Information Software
Si5347-D-EVB User's Guide 0.9 User Guides
PRCN #1607291: PRCN Si5340-41-42-44-45-46-47-48 Product Change Notifications (PCN)
PRCN #1503273: Si5347-46-45-44-42-41-40 Product Revision B Datasheets Reference Manuals ClockBuilder Pro-v1 Product Change Notifications (PCN)
PB #1507101 Si5347 46 45 44 42 41 40 v1.0 datasheet release Product Change Notifications (PCN)
Si5347 IBIS Model 3.95 Software
Si5347-D IBIS Model 4.3 Software
AN887: Si534x and Power Supply Noise 0.1 Application Notes
AN922: Using the Command Line Interface (CLI) for Frequency On-the-Fly with the Si5346/47 0.1 Application Notes
Si534x Applications Notice Part-Per-Trillion Frequency-Offset v1.4 Miscellaneous
Si5347 Si5346 Synchronous Ethernet G.8262 Compliance Test Results Rev1.0 1.0 Miscellaneous
Si5347-46 Errata Revision D 1.0 Errata
Si5347 Schematic Footprint and Symbols 1.0 Schematic and Layout Files
Si5347-D-EVB Schematic and Layout Files 2.2 Schematic and Layout Files
Si5347B Base Part Addendum B Data Sheet Addendums
Si5347-46 Rev B Errata 2.1 Errata
FAQs: Si5347/46 Dual/Quad DSPLL Any-Frequency, Any-Output Jitter Attenuators FAQs
AN905: External References: Optimizing Performance 0.3 Application Notes
Si5347/46 Rev D Data Sheet: Dual/Quad DSPLL Any-Frequency, Any-Output Jitter Attenuators 1.1 Data Sheets
AN909: DCO Applications with Jitter Attenuators Si5397/96/47/46 0.4 Application Notes
Si5347, Si5346 Revision D Reference Manual 1.3 Reference Manuals
Si5347/46 Rev. D ITU-T G.8262 Compliance Report 1.1 Miscellaneous
AN1051: Si534x/8x Schematic Review Checklist Application Note 0.1 Application Notes
AN1111: DSPLL Input Clock Expander 0.1 Application Notes
AN1057: Hitless Switching using Si534x/8x Devices 0.1 Application Notes
AN1077: Selecting the Right Clocks for Timing Synchronization Applications 0.1 Application Notes
AN1111: DSPLL Input Clock Expander 0.1 Example Code
UG286: ClockBuilderPro Field Programmer Kit 1.2 User Guides
CBPro Project File Inspector 1.0 Software
CBPro Project File Inspector README 1.0 Software
PB #1701254: Si534x 8x Xtal selector Product Change Notifications (PCN)
17051960 Relocation of Singapore Test Centre and Order Fullfillment Centre Product Change Notifications (PCN)
AN1093: Achieving Low Jitter Using an Oscillator Reference with the Si5342-47 Jitter Attenuators 0.1 Application Notes
AN1006: Differences Between Si534x/8x Revision B and Revision D Silicon 0.1 Application Notes
Si5347-46-45-44-42-41-40 Silicon A1 Revision Errata 081214 Errata
ClockBuilder Pro Field Programmer - 44 QFN socket - Design Files 2.0 Schematic and Layout Files
ClockBuilder Pro Field Programmer - 64 QFN socket - Design Files 2.0 Schematic and Layout Files
ClockBuilder Pro Field Programmer Dongle Design Files 2.0 Schematic and Layout Files
Clock Generators for Cloud Data Centers - Silicon Labs Whitepaper - Si534x Clock Generators - Frequency Flexible Clocks 1.0 White Papers
AN862: Optimizing Jitter Performance in Next-Generation Internet Infrastructure Systems 1.1 Application Notes
AN926: Reading and Writing Registers with SPI and I2C 0.3 Application Notes
Si534x/8x/9x Jitter Attenuators Recommended Crystal, TCXO and OCXOs Reference Manual 1.1 Reference Manuals
2.29 Release Notes
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