PCI Express (PCIe) Clock Generator Si52202-A02

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The Si52202-A02 2 output PCIe Gen1 Clock Generator provides industry-leading jitter performance, compliance with PCI Express (PCIe) Gen 1/2/3/4 requirements, outstanding frequency flexibility and configurable AC parameters for signal integrity optimization. The Si52202-A02 meets PCIe Gen1,2,3,4 phase jitter requirements with margin, and is available in industrial temperature range. The use of push-pull HCSL outputs ensures the lowest power consumption, while saving board space and external termination resistors for added BOM consolidation.

Similar Devices: Si52202-A01 Si52202-A02

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Specifications Summary

Reference Inputs: 1

Clock Outputs: 2

Phase Jitter (ps): 0.4

Input Frequency Min (MHz):

Input Frequency Max (MHz):

Output Frequency Min (MHz): 100

Output Frequency Max (MHz): 100

Output Format(s): HCSL

Jitter Attenuator: No

PCI Express: Yes

Package Type: QFN20

Package Size (mm): 3x3

Development Tools Type
Si52204-EVB Clock Evaluation Kit Evaluation Kits
PCIe Clock Generators and Buffers Evaluation Kits Development Kits
Title Version Resource Type
PCIe Clock Jitter Tool Installer 2.0 Software
2.0 Software
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AN871: Driving Long PCIe Clock Lines 0.2 Application Notes
UG277: Si52204-EVB User's Guide 2.1 User Guides
AN946: PCI-Express 4.0 Jitter Requirements 0.2 Application Notes
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17061678-End-Of-Life-Notification-for-Legacy-Timing-Products Product Change Notifications (PCN)
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PCI Express Solutions 2 Brochures
Selecting the Optimum PCIe Clock Source 1.0 White Papers
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Timing Jitter Primer eBook 2 White Papers
The Pros and Cons of Consolidating Frequency Sources Using Oscillators and Clock Generators 1.0 White Papers
Timing Jitter Tutorial and Measurement Guide (e-book) 1 White Papers
PB #1606031: Inner Box Label Change Product Change Notifications (PCN)
Si50122-A3_A4Rev0.7.fm 0.7 Data Sheets
AN699: FPGA Reference Clock Phase Jitter Specifications 0.1 Application Notes
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Timing Product Selector Guide Brochures
Timing Software Version Information Software
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