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Si5330L

LVDS Clock Buffers

The Si5330L is a LVDS 1 : 4 low jitter clock buffer. The Si5330L features a glitchless switching mux, making it ideal for redundant clocking applications. The device utilizes our advanced CMOS technology to fanout 4 clocks from 5  to 350 MHz with guaranteed low additive jitter, low skew and low propagation delay variability. The Si5330L features minimal cross-talk and provides superior supply noise rejection, simplifying low jitter clock distribution in noisy environments. Independent core and output bank supply pins provide integrated level translation without the need for external circuitry.

 
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Frequency Max (MHz)

Key Specs

 
Inputs
1
Outputs
4
Frequency Min (MHz)
5
Frequency Max (MHz)
350
Additive Jitter (ps)
0.15
Zero Delay Mode
No
Package
QFN24
Package Size (mm)
4x4
Inputs
1
Outputs
4
Frequency Min (MHz)
5
Frequency Max (MHz)
350
Additive Jitter (ps)
0.15
Zero Delay Mode
No
Package
QFN24
Package Size (mm)
4x4
generic-buffer-BD.png
Find quality, environmental, shipping, and supply chain information for Silicon Labs devices. You can also download the following environmental documents for each part number: Detailed Device Composition (MDDS), IPC 1752-2 Class 6 (XML format), RoHS Certificate of Compliance, ICP test reports, Halogen-Free Certificate of Compliance, PFOS/PFOA Certificate of Compliance, and REACH Declaration.
Company Name Silicon Laboratories, Inc.
Company Address 400 W. Cesar Chavez Austin, TX 78701
Date of Incorporation 1996
Terms and Conditions View PDF
California SB 657 View PDF
Corp Social Responsibility 1996

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