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Si53112

PCle Zero-Delay Buffers

The Si53112 is a 1 : 12 PCIe Fanout/Zero-Delay Buffer that meets all of the performance requirements of the Intel DB1900Z specification. The device is optimized for distributing 12  reference clocks for Intel® QuickPath Interconnect (Intel QPI), PCIe Gen 1/Gen 2/ Gen 3, SAS, SATA and Intel Scalable Memory Interconnect (Intel SMI) applications. The VCO of the device is optimized to support 100 MHz and 133 MHz operation. Each differential output can be enabled through I2C for maximum flexibility and power savings.

 
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Package Type

Clock Outputs

Key Specs

 
Inputs
1
Outputs
12
Frequency Min (MHz)
100
Frequency Max (MHz)
133
Additive Jitter (ps)
0.08
Zero Delay Mode
Yes
Package
QFN64
Package Size (mm)
9x9
Inputs
1
Outputs
12
Frequency Min (MHz)
100
Frequency Max (MHz)
133
Additive Jitter (ps)
0.08
Zero Delay Mode
Yes
Package
QFN64
Package Size (mm)
9x9
pcie-clock-buffers-zero-delay-buffers-BD.png
Find quality, environmental, shipping, and supply chain information for Silicon Labs devices. You can also download the following environmental documents for each part number: Detailed Device Composition (MDDS), IPC 1752-2 Class 6 (XML format), RoHS Certificate of Compliance, ICP test reports, Halogen-Free Certificate of Compliance, PFOS/PFOA Certificate of Compliance, and REACH Declaration.
Company Name Silicon Laboratories, Inc.
Company Address 400 W. Cesar Chavez Austin, TX 78701
Date of Incorporation 1996
Terms and Conditions View PDF
California SB 657 View PDF
Corp Social Responsibility 1996

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