David McParland, Silicon Labs Product Manager, Oscillator Products
Crystal oscillators are often one of the last components a designer thinks about, but the wrong part can quickly kill a design. Searching through the wide variety of available oscillators and their capabilities can be confusing. Here are four key questions to help ensure your design’s requirements are met.
Four Key Questions to Ask:
- Do you need a crystal or an oscillator?
- What jitter performance is required?
- Will your frequency change?
- How important is frequency stability?
Do You Need a Crystal or an Oscillator?
While they may look identical and share many specs, crystals and oscillators are very different devices. A packaged crystal is a piece of quartz, cut and polished to resonate at a specific frequency with high Q. It does NOT contain the oscillator circuit that drives the quartz to produce a clock output. Instead, the drive circuitry resides inside the device to which the crystal is connected.
In contrast, a crystal oscillator (XO) is a complete device that contains the quartz crystal, oscillator circuit, output driver and potentially a phase-locked loop (PLL). An XO provides a clock output at a specified frequency and signal format (e.g. CMOS, LVDS, LVPECL). An oscillator is a complete, tiny, one-output clock generator that can either drive a chip directly or be fed through a buffer to provide multiple copies of a particular frequency.
Most consumer and battery-powered applications use system-on-chip (SoC) devices with integrated oscillator circuitry and a simple, low-cost crystal for clock synthesis. For higher end applications, including data center, telecom, industrial and audio/video, an external XO is typically used to provide reference timing for the SoC’s internal PLLs. Using an off-chip clock source is advantageous because it provides an independent, isolated reference clock optimized to provide low-jitter operation with minimal cross talk. As another benefit, state-of-the-art oscillators incorporate integrated power supply noise rejection to minimize the impact of board-level noise on clock jitter.
What Jitter Performance Is Required?
Timing jitter is a way of measuring the purity of a clock signal. The lower the jitter, the less noisy it is. Since the oscillator typically functions as the local “heartbeat” of the system, a clean, low-jitter output is desirable. Jitter is measured in either the time domain on an oscilloscope (e.g. period jitter, cycle-to-cycle jitter), or in the frequency domain on a phase noise analyzer (e.g. RMS “phase” jitter integrated over a frequency band such as 12 kHz - 20 MHz as shown in Figure 1). Low phase jitter XOs (<200 fs RMS) are necessary in higher performance applications because high levels of clock jitter result in unacceptably high bit error rate (BER), lost traffic or
loss of system communication. When in doubt, it is always safer to start with a lower jitter clock source to provide more jitter margin.
In an ideal situation, either the application or the chipset driven by the oscillator will provide a maximum allowable jitter specification with accompanying integration band, phase noise mask and spur requirements. In these cases, the main consideration is how much jitter margin is desired from the oscillator to allow for any additive jitter from a buffer or other chips farther downstream in the timing path. Another consideration is that some XO datasheets only advertise a “typical” jitter specification. This does not guarantee device performance over process, voltage, temperature and frequency variation. Maximum jitter provides a more comprehensive specification that includes these additional factors.
More often than not, a hardware designer will not have a comprehensive set of jitter requirements for all key components in the system. Reference designs are helpful in this case because the oscillator on the design has already been vetted. It may also be helpful to work with a supplier that offers a wide variety of oscillators with different jitter and cost options as well as online tools to help you determine the best fit. When in doubt, it is always safer to start with a lower jitter oscillator, and then later evaluate relaxed jitter options as a potential future path to reduce cost.
Will Your Frequency Change?
Many oscillator applications only require a single, fixed frequency (e.g. 156.25 MHz). In other cases, the frequency provided by the oscillator may need to change. For example, a 12G-SDI video framer may need to toggle between two different video frame rates of 297 MHz and 297/1.001 MHz. At other times, it may be desirable to intentionally add a small frequency deviation as part of margin testing to stress-test system-level set up and hold times. Perhaps most commonly, designers may not yet know exactly which frequency the final design will use, but they know they will need an oscillator to provide this reference.
For these applications, the ideal solution is an oscillator that provides multiple, pre-stored frequencies. Dual and quad oscillators are available for these applications. The output frequency of these devices is pin-selectable, enabling a single XO to replace multiple oscillators and a mux. If the application requires a mix of integer and fractional clocks, select a device that offers consistently low jitter operation across all target frequencies.
Another useful type of oscillator is an I2C-programmable XO. These devices offer the most frequency flexibility, providing consistent low-jitter operation over a wide frequency range. These devices can be re-programmed on the fly in-circuit to provide a nearly infinite number of frequencies. They also are very useful for prototyping and use in digital PLL architectures in which a host processor provides a fast digital feedback mechanism to allow the XO to lock to and track a reference signal.
A voltage controlled crystal oscillator (VCXO) is used as part of a discrete PLL and operates by steering its output frequency up or down when an analog control voltage is applied to its Vc pin. Gain and Vc linearity are specifications unique to VCXOs. Gain represents how much the output frequency changes in response to a change in control voltage. State-of-the-art VCXOs offer multiple gain options and highly linear operation across control voltage and temperature, providing more consistent PLL operation across different conditions.
How Important Is Frequency Stability?
Frequency (or temperature) stability is a measure of how much the oscillator’s output frequency potentially changes during operation due to a change in temperature. If the frequency drifts beyond what the application expects, timing errors are likely to occur. Frequency stability is expressed in ppm (parts per million) relative to a nominal frequency over a specific temperature range. Oscillators use quartz crystals cut at different angles during manufacturing to produce different temperature responses. Common XO temperature stability ratings include ±20 ppm, ±50 ppm and ±100 ppm., A lower ppm means the output frequency is more stable over the temperature range.
Note that frequency stability is only one aspect of knowing how much an oscillator’s frequency may change. The most complete measurement of possible frequency deviation is called total stability, which is the sum of frequency stability over temperature, initial accuracy at 25°C, and aging over a specified time and temperature (all over worst-case process and voltage conditions). Total stability, as shown in Figure 2, reveals the worst-case possible frequency the oscillator might produce over its operating life.
An XO may have excellent frequency stability over temperature, but this measurement is only relative to the nominal frequency it provides at room temperature. Initial accuracy error can be quite large for some devices (e.g. SAW oscillators) and must be taken into consideration. Similarly, quartz crystals slowly age over long periods of time, which causes the output frequency to slowly drift. Some oscillator suppliers specify aging only for one year at 25°C, while more conservative suppliers specify aging for 20 years at higher temperatures, providing a more reliable guarantee across long-term operation. This aging condition can make a substantial difference in the total stability of the oscillator and can sometimes make an apples-to-apples comparison difficult. When in doubt, it is safer to use a timing device with guaranteed specifications over more stringent conditions to provide more design margin.
Silicon Labs offers the industry’s broadest portfolio of XO/VCXOs, clock generators, buffers, jitter attenuators and PCI Express clocks. Developers can find more than 100 application notes to learn more about timing design and jitter measurements and take advantage of free online tools to simplify design.
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Ultra Low Jitter XO Product Matrix
|Part Number||Customize||Data Sheet||Development Kit||Description||Phase Jitter (RMS) (ps)||Frequency Range (MHz)||Stability (+/- ppm)||Output Format(s)||Supply Voltage (V)||Temperature Range (ºC)||Package Size (mm)|
|Customize||Si5xxUC-EVB||Single Frequency XO||0.125||0.2 1500||50||LVPECL; LVDS; HCSL; CML; CMOS; DUAL CMOS||1.8 - 3.3||-40 85||3.2x5; 5x7|
|Customize||Si5xxUC-EVB||Dual Frequency XO||0.125||0.2 1500||50||LVPECL; LVDS; HCSL; CML; CMOS; DUAL CMOS||1.8 - 3.3||-40 85||3.2x5; 5x7|
|Customize||Si5xxUC-EVB||Quad Frequency XO||0.125||0.2 1500||50||LVPECL; LVDS; HCSL; CML; CMOS; DUAL CMOS||1.8 - 3.3||-40 85||3.2x5; 5x7|
|Customize||Si5xxUC-EVB||I2C Programmable XO||0.125||0.2 1500||50||LVPECL; LVDS; HCSL; CML; CMOS; DUAL CMOS||1.8 - 3.3||-40 85||3.2x5; 5x7|
|Customize||Si5xxUC-EVB||Single Frequency XO||0.08||0.2 1500||50||LVPECL; LVDS; HCSL; CML; CMOS; DUAL CMOS||1.8 - 3.3||-40 85||3.2x5; 5x7|
|Customize||Si5xxUC-EVB||Dual Frequency XO||0.08||0.2 1500||50||LVPECL; LVDS; HCSL; CML; CMOS; DUAL CMOS||1.8 - 3.3||-40 85||3.2x5; 5x7|
|Customize||Si5xxUC-EVB||Quad Frequency XO||0.08||0.2 1500||50||LVPECL; LVDS; HCSL; CML; CMOS; DUAL CMOS||1.8 - 3.3||-40 85||3.2x5; 5x7|
|Customize||Si5xxUC-EVB||I2C Programmable XO||0.08||0.2 1500||50||LVPECL; LVDS; HCSL; CML; CMOS; DUAL CMOS||1.8 - 3.3||-40 85||3.2x5; 5x7|