What is the difference between devices with a JTAG debug interface and a C2 debug interface?
JTAG is an industry-standard 4-wire interface. It is found on many of Silicon Labs' MCU devices in large pin-count packages, such as the C8051F12x family. The JTAG interface on all but the C8051F20x/22x/23x families includes full boundary scan capability for in-circuit testing. While the C8051F20x/22x/23x do not have boundary scan capabilities, they can still participate in a boundary scan chain in 'BYPASS' mode.
The JTAG standard requires four dedicated pins for functionality. On devices which have only a few pins, implementing a JTAG interface is not feasible. It is for this reason that the C2 interface was developed.
The C2 interface is a proprietary 2-wire serial debug interface used primarily on Silicon Labs' MCU devices in low pin-count packages, such as the C8051F30x family. The C2 debug interface shares its two serial pins with other device pins (normally /RST and a GPIO pin) to minimize the amount of hardware 'used up' by the debug interface.
The Debug Interface specific to your device can be set in the Silicon Labs IDE in the Tools -> Debug Interface menu. This setting must be correct in order to connect to a device using the IDE. A schematic for each target board, which contains hardware information on using these interfaces, can be found in the appropriate Development Kit User's Guide.