From the datasheet the SDO output pin should enter high-Z when EN is high. I have tried 3 different chips, and all of them have high SDO pin. Exept of this, the SPI communication is ok. VDDA and VDDB is +3V3. Any suggestions?
How did you measure this pin is high? Have you tried adding a 10k pulldown? Is it still high then?
I have tried connecting a 10k pulldown and it's still high.
Ok. I just wanted to check your conclusion.
I guess a SiLabs employee needs to answer this now. If you don't get an answer here, try opening a support ticket. And if you get any answers, please report back here for others to find.
Answer from SiLabs:
The Si89xx has no enable pin, so the SDO output is a push-pull output with no pull-up. If you need tristate or OD output, you will need a tristate buffer or OD buffer.
EN Rising to SDO High-Z tSDZ — — 160 ns.
Updated SiLabs answer:
I have learned that the SPI bus on this part is not compliant, and will not release SDO. The data sheet will be revised. You will need a tristate or OD buffer in order to share the line.