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      • GPIO Glitch Suppression Filter

        marao | 01/16/2018 | 09:11 PM

        Question

        When setting up GPIO, there's an option to use a glitch suppression filter. Can you give more details about the filtering? (For example, does it act like a capacitor to shunt spikes or is it more sophisticated and can be considered like debounce logic)?  

        Answer

        The glitch suppression filter does not have advanced debounce logic. It can filter pulses up to 25 ns in width, and it is always advisable to have either hardware or software workarounds in case there is a possibility of accidental glitches being registered as button presses- 

        1. Hardware workaround -  Add additional caps on the GPIOs
        2. Software workaround - Every time the GPIO interrupt is called, disable it and have a timer waiting upto 35 ms before enabling the GPIO interrupts again. That way, you will avoid triggering the GPIO interrupt functions everytime a false button press is detected. 

      • CMUCLKOUT2 in EFM32GG11

        amenleung | 01/16/2018 | 04:30 AM

        Except CMUCLKOUT0 and CMUCLKOUT1, EFM32GG11 has an additonal clock output, which is CMUCLKOUT2.

        The clocks which can be produced via CMUCLKOUT0, CMUCLKOUT1 and CMUCLKOUT2 are selected via the CLKOUTSEL0, CLKOUTSEL1 and CLKOUTSEL2 fields respectively in CMU_CTRL register.

        To enable CLKOUT2 output on the pin, set CLKOUT2PEN in CMU_ROUTE and select locaction (CLKOUT2LOC) in CMU_ROUTELOC0.

        Two more clocks can be selected as the CMUCLKOUT2 output, which are HFXODIV2Q (HFXO divided by two qualified) and HFXOX2Q (HFXO doubler qualified). These two clocks are usually used for Ethernet peripheral.

         

      • High Frequency Peripheral Clocks in EFM32GG11

        amenleung | 01/16/2018 | 04:12 AM

        The high frequency peripherals are grouped into three different peripheral clock domains, which are HFPERCLK, HFPERBCLK, and HFPERCCLK (refer to Table 10.2 in EFM32GG11 reference manual for peripherals belong to which clock domain).

        The prescale factors for prescaling HFCLK into HFPERCLK, HFPERBCLK, and HFPERCCLK are set using the CMU_HFPERPRESC, CMU_HFPERPRESCB, and CMU_HFPERPRESCC registers respectively. The setting can be changed dynamically and the new setting takes effect immediately.

          // HFPERCLK domain divided by 4
          CMU_ClockDivSet(cmuClock_HFPER, cmuClkDiv_4);
          // HFPERBCLK domain divided by 4
          CMU->HFPERPRESCB = 3 << _CMU_HFPERPRESCB_PRESC_SHIFT;
          // HFPERCCLK domain divided by 4
          CMU->HFPERPRESCC = 3 << _CMU_HFPERPRESCC_PRESC_SHIFT;
        

          

      • How does the Animation State Machine work in LCD ?

        yucheng | 12/362/2017 | 03:20 AM

        The Animation State Machine makes it possible to enable different animations without any software intervention. It allows specialized patterns running on the LCD panel while the microcontroller remains in Low Energy Mode saving power.

        The animation feature is available on 8 segments multiplexed with LCD_COM0. The 8 segments can be segments 0 to 7 (or 8 to 15 for some devices, depending on ALOC in LCD_BACTRL).

        The animation is implemented as two programmable 8 bit registers LCD_AREGA and LCD_AREGB that are shifted left or right, the shifting operations are controlled by AREGASC and AREGBSC in LCD_BACTRL and the shifting operations are triggered by frame counter event. The final displayed animation pattern is the result of either OR'ed or AND'ed operation which controlled by ALOGSEL in LCD_BACTRL.

        The animation registers and shift operation can be seen in figure below.

        For example, set LCD_AREGA and LCD_AREGB as 11000000b, and set AREGASC = SHIFTRIGHT, AREGBSC = SHIFTRIGHT, set the operation logic as OR.

        All of the states included in the table below. The first frame counter event will drive the LCD_AREGA shift right one bit, and the next frame counter event will drive the LCD_AREGB shift right one bit, and repeat the process (The yellow shading in the table means a shifting operation be triggered).

        Note that the shifting operation is performed on internal inaccessible registers but not LCD_AREGA and LCD_AREGB directly, when reading LCD_AREGA and LCD_AREGB, the data that was original written will also be read back.

         

      • How to calculate or configure the frame rate of LCD display ?

        yucheng | 12/362/2017 | 01:55 AM

        It is important to choose the correct frame rate for the LCD display. Normally, the frame rate should be between 30 and 100 Hz. A frame rate below 30 Hz may lead to flickering, while a frame rate above 100 Hz may lead to ghostring and unnecessarily high power consumption.
        The LFACLK is prescaled to LFACLKLCDpre in the CMU. In addition to selecting the correct prescaling, the clock source can be selected in the CMU, it can be LFXO LFRCO or ULFRCO. 
         

        The frame rate phase frequency is set with FRDIV in LCD_FRAMERATE. The equation for calculating the resulting frame rate phase frequency is given below.

        LFACLKLCD = LFACLKLCDpre/(1 + FRDIV)

        The FRDIV sets the frame rate phase frequency and the number of phases per frame is determined by the multiplex setting. A Static MUX selection will have two phase periods per frame, while an Octaplex MUX selection will have 16 phase periods per frame.

        For example, select the LFRCO as the LFACLK, and configure LCD prescaler as 1/32 in the CMU. The LFACLKLCDpre will be 32768/32 = 1024 Hz. Then set FRDIV as 1, LFACLKLCD will be 1024/(1+1)=512 Hz. If select the octaplex multiplexing, the finial frame rate will be LFACLKLCD/16 = 512/16 = 32 Hz.

      • Distinction between PCB and BRD revision

        PhillipB | 12/348/2017 | 10:45 PM

        Question:

        Simplicity Studio reports that my Wireless STK (WSTK) is revision A01, but the silkscreen on the underside of the WSTK clearly reads "Rev A03".  Is this a problem?

        Answer:

        There is likely no problem, as this can usually be explained by the difference between a board assembly (BRD) revision and a PCB revision.  For example, the BRD4001A Rev. A01 contains the PCB PCB4001A Rev. A03 (in addition to all the other components of the board's BOM).  Some devices may depict the BRD revision with a sticker applied to the WSTK (see below).  You may be comparing the BRD revision reported in Simplicity Studio to the PCB revision printed in the silkscreen, which won't necessarily be identical.

         

      • How do I add "Adapter Pack" activity to my Bug Report logs?

        PhillipB | 12/348/2017 | 05:43 PM

        When submitting bug report log files to the community forum or a support case, it is often helpful to include activity generated by your Adapter Packs (if your project is using any) within these logs.  Adapter pack logging is not enabled by default, but you can capture such history in your logs by navigating to the appropriate Preferences pane and checking the "Adapter pack log" option as follows:

        1) Open the Preferences window, either by clicking the gear/sproket icon near the top left of your Simplicity Studio window, or by navigating through the top level menu to [Window]>[Preferences]

         

        2) In the left pane, navigate to [Simplicity Studio]>[Adapter Packs], click the box next to "Adapter pack log:" to enable this option, then click [OK] to save this setting

         

        3) Now that adapter pack logging is enabled, try to connect to your device again before generating the log file, as this will capture the commands and error codes seen by the various installed adapter packs.

      • Difference in capsense between AN0028 and ZG/HG demos

        jstine | 12/345/2017 | 11:53 AM
        Capsense projects using LESENSE, as described in AN0028 are able to manage the comparators through LESENSE in EM2, reducing the amount of power needed to run the example.  Parts like the EFM32ZG, EFM32HG and EFM32PG1 do not have LESENSE.  They can implement a capacitive sensor using the comparators, however the part must be in EM1 or EM0, increasing the amount of power used.
      • Using GPIO pull up and pull down on analog signals

        jstine | 12/345/2017 | 11:36 AM

        Is it possible to use digital GPIO pull up and pull down functionality on a pin that is connected to APORT on EFM32PG1?


        Yes, the pull up and pull down functionality of the GPIO block can be used.  This will enable the input buffer and may cause increased current consumption if both transistors of the input buffer are activated by an intermediate signal.  This will also enable over voltage tolerance circuitry which may cause a slight distortion (only noticeable at 12 bits of precision) and a slight increase in settling time. 

      • Missing header files

        Stephen | 12/342/2017 | 02:22 PM

        Question

        When building my project, I am receiving the following error message from the compiler

        ../src/main.c:3:28: fatal error: my_header_file.h: No such file or directory

        What does this error mean, and how do I resolve it?

         

        Answer

        In the example above, main.c line 3 includes a my_header_file.h. The compiler search the "include paths" specified in the project settings and was unable to locate this file.

        To resolve this error, add the "include path" to the header file in the project settings:

        1. In the IDE, in the Project Explorer, right click the [project name]>[Properties]
        2. Navigate to C/C++ Build Settings
        • If you are using GCC: continue navigating to [GNU ARM C Compiler]>[Includes] (pictured below)
        • If you are using IAR: continue navigating to [IAR C/C++ Compiler for ARM]>[Preprocessor]