What do you mean by

But, Timer Reload Overflow Period is Very Short.

 

why you configure the overflow of timer1 as 1200000 (1.2MHz, instead of 400kHz) if you target SMBus is 400k?

I used the oscilloscope to measure the SCL.

Then the SCL's frequency low period was exactly the same as "Timer Reload Overflow Period."

In the lowest figure, the value of the SMBus0 SCLK Frequency is 408.333 kHz with the SCL Low being measured at 816 ns.

 

I'm sorry if my question was wrong.

I want to know two things.

1.  How to change the SMBus SCL Clock to 400 kHz.

2. And does the SCL Low Period satisfy the spec (1.3us)? If not, is there a way to modify it?

Try changing the value in red:

 

this KBA should answer your question on the 1.3uS low question:

https://www.silabs.com/community/mcu/8-bit/knowledge-base.entry.html/2017/12/05/smbus_timing_perform-wr8Z