What is the maximum value of the pulse width of spikes for Silicon Labs 8051 MCU SMBus/I2C slave?
For SMBus interface, our 8051 devices have a 2-SYSCLK glitch filter for all digital inputs. The pin needs to be at the new level for at least 2 SYSCLKs before it’s seen internally. Therefore, if there are 50 ns spikes on the SMBus SCL or SDA line, the system clock would need to be no greater than 40 MHz.
Unlike SMBus, the I2C Slave (I2CSLAVE0) interface input filter does not depend on system clock, it can suppress noise spikes up to 50 ns in Standard (up to 100 kbps), Fast (400 kbps) or Fast Plus (1 Mbps) mode.