Cannot set reference frequency over 54MHz in ClockBuilder Pro v2.35
08/216/2019 | 11:17 AM
I am using Si5394A RevA EVB and ClockBuilder Pro v2.35
Trying to set Reference to XO 100MHz but the entry window says "Frequency Range 24.97MHz to 54.06MHz"
I know that the part has divider in XO path that can be set to 1/2/4/8 and manual says:
" For best jitter performance, use a XAXB frequency above 40 MHz. Also, for XAXB frequencies higher than 125 MHz, the PXAXB con-trol must be used to divide the input frequency down below 125 MHz"
" A PREF divider is availa-ble to accommodate external clock frequencies higher than 54 MHz "
Is this a bug, a feature or a trick?
Leo
Discussion Forums
Timing
Answered
Answered
Hi Leo,
Si5394A datasheet does require the REFCLK Frequency be within 24.97MHz - 54.06MHz on its Page 27. It has been characterized to get guaranteed performance within this frequency range. So, ClockBuilder Pro follows this requirement strictly, and it is not a bug.
If you still like to try a XO of 100MHz, although we strongly recommend not, you may work around the limit of ClockBuilder Pro through setting XO=50MHz, export the register file, revise the PXAXB register from 0 (divider value =1) to be 1 (divider value=2) as shown on Page 73 of Si5394A RM, and then import the new register file to the chip on EVB through GUI tool of ClockBuilder Pro.
Cannot set reference frequency over 54MHz in ClockBuilder Pro v2.35
I am using Si5394A RevA EVB and ClockBuilder Pro v2.35
Trying to set Reference to XO 100MHz but the entry window says "Frequency Range 24.97MHz to 54.06MHz"
I know that the part has divider in XO path that can be set to 1/2/4/8 and manual says:
" For best jitter performance, use a XAXB frequency above 40 MHz. Also, for XAXB frequencies higher than 125 MHz, the PXAXB con-trol must be used to divide the input frequency down below 125 MHz"
" A PREF divider is availa-ble to accommodate external clock frequencies higher than 54 MHz "
Is this a bug, a feature or a trick?
Leo
Hi Leo,
Si5394A datasheet does require the REFCLK Frequency be within 24.97MHz - 54.06MHz on its Page 27. It has been characterized to get guaranteed performance within this frequency range. So, ClockBuilder Pro follows this requirement strictly, and it is not a bug.
https://www.silabs.com/documents/public/data-sheets/si5395-94-92-a-datasheet.pdf
If you still like to try a XO of 100MHz, although we strongly recommend not, you may work around the limit of ClockBuilder Pro through setting XO=50MHz, export the register file, revise the PXAXB register from 0 (divider value =1) to be 1 (divider value=2) as shown on Page 73 of Si5394A RM, and then import the new register file to the chip on EVB through GUI tool of ClockBuilder Pro.
https://www.silabs.com/documents/login/reference-manuals/si5395-94-92-family.pdf
if any further question, feel free to let me know.
Regards,
Andy