What's is Silicon Lab's CAGE (Commercial and Government Entity) code as registered with the United States Defense Logistics Agency (DLA)?
This information can be found on the following website: http://www.govcagecodes.com/?code=&company=silicon+laboratories#results
Can a direct tie match be used for greater than +13dBm with Si443x and Si446x radios?
For Si443x radios the direct tie matching topology may be used with a transmit power up to +17 dBm. Higher power settings may degrade the device over time. We recommend the RF switch topology for high power settings.
For Si446x radios there is no power limitation, the direct tie matching network can be used up to +20 dBm. For +20 dBm transmit power we provide both direct-tie and RF switch topology reference designs.
We're having issues with opens or shorts with the Si10xx device on our PCB.
The Si10xx wireless MCU devices all use a 0.5mm pitch surface mount package.As with other surface mount devices, the solder paste and PCB land pattern may require fine adjustment in design to optimize yield.
Common issues include open pins.This may be caused by lack of paste on the signal pins, a release issue where the solder paste sticks to the opening of the stencil and does not deposit on the PCB, or possibly an imbalance between solder coverage on the E-pad and the surrounding signal pads.The device may float on a pool of solder on the E-pad, keeping the clearance between paste and pin on outer pads high enough that they do not wet. Reducing the solder coverage on the E-pad may help.
Shorted pins occur occasionally, indicating that too much solder paste may be used. One possible solution is to elongate the PCB pads and solder mask openings to provide a reservoir area of sorts for excess solder to bead. Excessive solder on the E-pad will likely short signal pins to the E-pad ground.
Some Si10xx datasheets contain recommendations for via placement. This is important to follow, as vias expand lengthwise at a different rate than the PCB or package and can cause mechanical stress.
PCB singulation (or, the process of removing individual boards from a panel of boards) may also cause damage. Boards using a score-and-break method may flex the PCB beneath the device. This may cause pads to separate from the package or PCB. Singulation via routing may help.
Is a High-Tg PCB really necessary for Si10xx designs?
High-Tg PCB substrates (PCB dielectrics with a high Glass Transition temperature) are recommended in general for all lead-free designs since the required reflow temperatures are higher than traditional leaded designs.
Tg is the temperature at which the PCB substrate begins to soften and lose its mechanical properties. The material may also expand at high temperatures and contract as it cools. These mechanical changes cause stresses in the PCB to pad connections and the Si10xx device packaging and can lead to failure.
How should I connect the pins which are not intended to be used on Si106x/8x?