With on-chip power-on reset, VDD monitor, watchdog timer, and clock oscillator, the C8051F8xx devices are truly stand-alone, system-on-a-chip solutions. The Flash memory can be reprogrammed even in-circuit, providing non-volatile data storage, and also allowing field upgrades of the 8051 firmware. User software has complete control of all peripherals, and may individually shut down any or all peripherals for power savings.

The C8051F8xx processors include Silicon Labs’ 2-Wire C2 Debug and Programming interface, which allows non-intrusive (uses no on-chip resources), full speed, in-circuit debugging using the production MCU installed in the final application. This debug logic supports inspection of memory, viewing and modification of special function registers, setting breakpoints, single stepping, and run and halt commands. All analog and digital peripherals are fully functional while debugging using C2. The two C2 interface pins can be shared with user functions, allowing in-system debugging without occupying package pins.

Each device is specified for 1.8–3.6 V operation over the industrial temperature range (–45 to +85 °C). An internal LDO is used to supply the processor core voltage at 1.8 V. The Port I/O and RST pins are tolerant of input signals up to 2 V above the VDD supply.

Additional resources:

QuickSense Development Studio
Capacitive Touch Sense Application Note  (AN338)
Capacitive Touch Sense Example Firmware (AN338SW)
Understanding Capacitive Sensing Signal to Noise Ratios (AN367)
QuickSense Firmware API (AN366)
Baselining in the Capacitive Sensing Firmware API (AN418)