Silicon Labs' MultiSynth technology simplifies clock generation in communication, storage and broadcast video applications. MultiSynth is a low jitter fractional divider that supports phase error correction.

Clock generators that employ this proprietary technology can produce multiple non-integer related output clocks from a single device, eliminating the need for standalone crystal oscillators and clock generator ICs. The MultiSynth approach leverages proprietary phase error cancellation circuitry to provide any-rate frequency synthesis at very low jitter of 1 ps rms typical.

Silicon Labs' clock generators can support any frequency from 0.16 to 350 MHz and select frequencies to 700 MHz on each of the device clock outputs. All outputs are created with a frequency synthesis error of 0 ppm. Given this frequency flexibility, physical layer and control plane clocks can be generated by a single device, providing significant reduction in BOM complexity, cost and design time.

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