When POE cable is plugged in, it charges for the first time but it becomes impossible to charge soon. I think that the POE side circuit is a problem because I operate normally when only 5V is applied to the charge IC.
Since it is confirmed that 5V is output from the output terminal, it is not a voltage problem.
I attach the schematic that I composed with PDF.
Please make sure that there is something strange in my circuit.
I am using Si83414AAA-IF with 24V VDD2 power supply. When running, Si83414AAA-IF has a temperature of more than 45 degrees Celsius although no channels are enabled. With the VDD2 12V power supply, the temperature is close to 40 degrees Celsius. Ambient temperature 25 degrees C.
Can you confirm for me that the temperature is normal?
Why does it have such a high temperature when in operation?
we found that following component is not as per Datasheet,
Part - Si8388P-IU
Description - 8 channel isolator
We have received the same part with the proper part name printed on IC.
As per the datasheet, all 8 channels should be high speed channels.
But we observed that the first 4 channels are high speed and the remaining 4 are slow speed (It seems like such functionality is related with part Si8384P).
So please look at the issue whether the received part is proper or not.
we found that following component is not as per Datasheet,
Part - Si8388P-IU
Description - 8 channel isolator
We have received the same part with the proper part name printed on IC.
As per the datasheet, all 8 channels should be high speed channels.
But we observed that the first 4 channels are high speed and the remaining 4 are slow speed (It seems like such functionality is related with part Si8384P).
So please look at the issue whether the received part is proper or not.
Hi ,
1. I would like to know if Si8751 is suitable to drive large FET (IRFP7718) with gate charge of 552nC and CiSS = 29550 pF . ( as in the data sheet the gate capacitance is assumed to be 100pF_).
2. The switching frequency of the load is slow at 1Hz. The load is a 20,000uF capacitor . The Supply voltage is a 48v battery. will this cause stress on the FET ? as it will see the load as short circuit and stay in linear region for app 10ms ( my calculations for TT connected to GND)
3. I will use a 100pF capacitor from MCAP1 to FET Drain for miller clamp . Any comment on making circuit more robust and reliable ?
Pardon me if i am asking this question on the wrong board.
We are using SI5338 clock generator to provide single ended clocks to two of the devices we are using . One is TLK2711 and the other one is microchip's FPGA (RTG4). TLK2711 has max clock jitter pk-pk requirement as 40 ps but we are not able to meet it through SI5338. When we tried to measure the jitter of the clock from SI5338, its PJrms value is 17.4 ps which if we multiply to Crest factor of 14 (as applicable for the bit rate of 1e-12 for clock signals) gives us peak to peak value of 243.6 ps (way higher than the TLK2711 data sheet specification of 40 ps).
SI5338 datasheet says period jitter max value is 30 ps pk-pk and we are getting nowhere close to this.
Any suggestions or ideas what we are missing here?
If you do not, don't start; they're kind of a mess and their toolchain is buggy. If you do, do you have any idea how to view program memory after a build in their IDE? I'm developing a bootloader and have no idea what the build is spitting out, and I'm sick of reading raw hex files. I've tried asking on Silabs forum, but I'm starting to think I might be the only person who uses this chip.
Hi,
i am using an SI8920 to observe a current over a shunt (what else..). The result is differentially amplified and is fed in a differential ADC. Now the ADC readings give some head ache since i am seeing some tones generated from the SI8920.
I have attached 2 images: one shows the base-line spectral noise of my system (via FFT on a 933kSPS signal stream) and one with the SI8920BC with shorted inputs.
Those tones are device-specific (85kHz in this example). That means, every SI8920 on my PCB (i am using 4 in parallel on 4 ADC-Channels) has a different noise-frequency peak and when desoldered and swapped around the specific tones follow the chip.
Those tones vary widely within the spectrum. I have a PCB where, by mere luck, all tones are so high, they are swallowed by the aliasing filter. Then i have a PCB where all are right in my spectrum of interest.
If anyone knows where this tone comes from and how to influence the frequency of this disturbance, i am all ears.
I have a question regarding the SI8271BB-IS gate drive (single gate drive with VO+ and VO- outputs). Our chip regularly burns down without any apparent reason. However, I connected both outputs (VO+ and VO-) directly together since I'm only using a common resistor for turn-on and turn-off. Could it be that there is a short overlap interval during the switching transient where both outputs are still driving their pin, thereby leading to a short circuit? Unfortunately the datasheet doesn't provide a lot of information about the output stage of the driver.
Forum
Question about si3402
Hello,
I am using the SI3402 chip to use POE.
But it does not work properly.
The circuit I have constructed is as follows.
POE: SI3402 (non-isolated)
Ethernet: W5500
Ethernet Transceiver: H2019NL
Charging: BQ25601
When POE cable is plugged in, it charges for the first time but it becomes impossible to charge soon. I think that the POE side circuit is a problem because I operate normally when only 5V is applied to the charge IC.
Since it is confirmed that 5V is output from the output terminal, it is not a voltage problem.
I attach the schematic that I composed with PDF.
Please make sure that there is something strange in my circuit.
Thank you.
High operating temperature Si83414AAA-IF
I am using Si83414AAA-IF with 24V VDD2 power supply. When running, Si83414AAA-IF has a temperature of more than 45 degrees Celsius although no channels are enabled. With the VDD2 12V power supply, the temperature is close to 40 degrees Celsius. Ambient temperature 25 degrees C.
Can you confirm for me that the temperature is normal?
Reverse power-supply polarity protection for SI83414AAA-IF (Si834x)
Hi, I'm using the SI83414AAA-IF.
My application provides to the final user terminals for connect the power supply on VDD2 and GND2 (see attached schematic).
According to datasheet, VDD2 Supply Voltage limits are -0.3 to +40V.
1) Can I use a schottky diode for reverse polarity protection connection in VDD2 terminals (see attached schematic) ?.
2) It's safe?.
3) It's redundant? Si834x is already protected?.
Note-1: DOCOM2+ and DOCOM2- are the name of external terminals availables for user connection to power-supply.
Note-2: I'm planing to replace the polarized electrolytic capacitor (C13) for non-polarized electrolytic capacitor.
Thanks in advance!.
Received wrong part Si-8388P-IU
we found that following component is not as per Datasheet,
Part - Si8388P-IU
Description - 8 channel isolator
We have received the same part with the proper part name printed on IC.
As per the datasheet, all 8 channels should be high speed channels.
But we observed that the first 4 channels are high speed and the remaining 4 are slow speed (It seems like such functionality is related with part Si8384P).
So please look at the issue whether the received part is proper or not.
Attaching the order detail and actual ICs photo.
Received wrong part Si-8388P-IU
we found that following component is not as per Datasheet,
Part - Si8388P-IU
Description - 8 channel isolator
We have received the same part with the proper part name printed on IC.
As per the datasheet, all 8 channels should be high speed channels.
But we observed that the first 4 channels are high speed and the remaining 4 are slow speed (It seems like such functionality is related with part Si8384P).
So please look at the issue whether the received part is proper or not.
Attaching the order detail and actual ICs photo.
SI3404 burned
Hi,
We are using the SI3404 chip to use POE, When we used the standard PoE injectors, it works perfectly.
But when we used the non-standard PoE injectors, the chip would burn out occasionally.
Our design is a reference of Si3404-Buck EVB board. Is the SI3404 not support the non-standard PoE injectors ?
Thank you for your Help.
Using Si8751 for High power DC SSR
1. I would like to know if Si8751 is suitable to drive large FET (IRFP7718) with gate charge of 552nC and CiSS = 29550 pF . ( as in the data sheet the gate capacitance is assumed to be 100pF_).
2. The switching frequency of the load is slow at 1Hz. The load is a 20,000uF capacitor . The Supply voltage is a 48v battery. will this cause stress on the FET ? as it will see the load as short circuit and stay in linear region for app 10ms ( my calculations for TT connected to GND)
3. I will use a 100pF capacitor from MCAP1 to FET Drain for miller clamp . Any comment on making circuit more robust and reliable ?
Si5338 doesn't give period jitter of 30 ps pk-pk max.
Pardon me if i am asking this question on the wrong board.
We are using SI5338 clock generator to provide single ended clocks to two of the devices we are using . One is TLK2711 and the other one is microchip's FPGA (RTG4). TLK2711 has max clock jitter pk-pk requirement as 40 ps but we are not able to meet it through SI5338. When we tried to measure the jitter of the clock from SI5338, its PJrms value is 17.4 ps which if we multiply to Crest factor of 14 (as applicable for the bit rate of 1e-12 for clock signals) gives us peak to peak value of 243.6 ps (way higher than the TLK2711 data sheet specification of 40 ps).
SI5338 datasheet says period jitter max value is 30 ps pk-pk and we are getting nowhere close to this.
Any suggestions or ideas what we are missing here?
Does anyone here use the Silabs SiM3u1xx series of ARM micros?
If you do not, don't start; they're kind of a mess and their toolchain is buggy. If you do, do you have any idea how to view program memory after a build in their IDE? I'm developing a bootloader and have no idea what the build is spitting out, and I'm sick of reading raw hex files. I've tried asking on Silabs forum, but I'm starting to think I might be the only person who uses this chip.
https://jiofilocalhtml.co.in/
https://19216881.link/
https://router-network.uno/
AT Command sequence For Voice Communication using Si2494-A-FM18-EVB
We were Evaluating Si2494-A-FM18-EVB for Voice communication. We have connected Handset(Speaker and Mic) and PSTN line.
Can you please tell us the sequence of AT commands to configure in Si2494 Using Ultracom software for Voice communication?
Thank you so much in advance.
Driving complementary mosfets
For a system we are designing, where we have to use a complementary mosfet pair, are there any silab isolated drivers that will work ?
Thanks
Steve
SI8920BC noise tones
Hi,
i am using an SI8920 to observe a current over a shunt (what else..). The result is differentially amplified and is fed in a differential ADC. Now the ADC readings give some head ache since i am seeing some tones generated from the SI8920.
I have attached 2 images: one shows the base-line spectral noise of my system (via FFT on a 933kSPS signal stream) and one with the SI8920BC with shorted inputs.
Those tones are device-specific (85kHz in this example). That means, every SI8920 on my PCB (i am using 4 in parallel on 4 ADC-Channels) has a different noise-frequency peak and when desoldered and swapped around the specific tones follow the chip.
Those tones vary widely within the spectrum. I have a PCB where, by mere luck, all tones are so high, they are swallowed by the aliasing filter. Then i have a PCB where all are right in my spectrum of interest.
If anyone knows where this tone comes from and how to influence the frequency of this disturbance, i am all ears.
Lead finish/Plating
Reliability Si88342EC-IS and Si8621BT-IS
Hi,
where can i find the MTBF/Fit rates for Si88342EC-IS and Si8621BT-IS?
Kind Regards Rolf
Connect VO+ and VO- of SI8271 gate driver
I have a question regarding the SI8271BB-IS gate drive (single gate drive with VO+ and VO- outputs). Our chip regularly burns down without any apparent reason. However, I connected both outputs (VO+ and VO-) directly together since I'm only using a common resistor for turn-on and turn-off. Could it be that there is a short overlap interval during the switching transient where both outputs are still driving their pin, thereby leading to a short circuit? Unfortunately the datasheet doesn't provide a lot of information about the output stage of the driver.