My application is 2MHz, 21kW, full bridge inverter, VDD<200V, SIC MOSFET C3M0065090D . SI8274 is used as an isolator, not drive SIC Mosfet directly. Input 5V 2MHz signal, then Si8274, each output of SI8274 is connected to each driver buffer IXDD614 before driving SIC MOSFET. All used isolated supply for gate drivers, +20V and +5V (attached picture): +20V to VDDA or VDDB; +5V to S of SIC mosfet
VDDI of SI8274 is 5V.
The problem is low side output of SI8274 frequently burned even it can be burned when there is no VDD suppy to MOSFET. Here are some cases I listed which burning occurs (only low side output of SI8274 is fired)
1. Isolated supplies 20V to VDDA, VDDB; 5V to S of SIC MOSFET; 5V to VDDI and EN pin (all supplied same time) no input signal
--> Sometimes, low side output VDDB, VOB, GNDB is burned even without 2MHz input
2. Isolated supplies 20V to VDDA, VDDB, 5V to S of SIC MOSFET --> then 5V to VDDI --> then input signal 2MHz --> 5V to EN pin
--> SI8274 burned ( low side output VDDB, VOB, GNDB)
3. Several cases by changing power supplies sequence or when output power is ~500W --> sometimes SI8274 is burned. I've tried to analyze it but didnt find out reason yet
I am totally new to this forum looking for a help. Any tips and advice regarding my issue would be appreciated. I am jacksonlevi, working in a Corporate animation Company. I wanted to know that could the VDDA and GNDA actually be configured such that if, for example, a +15V/-5V bi-polar type biasing be fed into the chip and the source/emitter return of the device connected to separate neutral point?Or a different way could be that a 20V supply be placed between those pins, then using a secondary zener diode with resistors and capacitors create a +15V/-5V gate biasing ckt w/ a derived, floating source/emitter return point.Is there anything in the chip itself that would prevent negative biasing or reverse current flow? I have serached for this issue but did not find any right solution. Please help me
There is no mention in the datasheet of these parameters. The only reference I can find is the 500kHz test for the PWM input to the EVAL board. I need to run the PWM input over 2MHz and the duty cycle needs to run as close to 0 and 100% as possible.
One could guess that the minimum pulse width corresponds to the prop delay plus a rise time (e.g., 30ns + 10.5ns = 40.5ns). To hit 5% duty factor, the PWM period would have to be at least 20 x 40.5ns = 810ns or a PWM frequency of 1.2MHz. If the minimum pulse period equals two prop delays plus a rise time and a fall time (e.g., 2x30ns + 10.5ns + 13.3ns = 83.8ns), then the typical maximum PWM frequency could be as high as 11.9MHz.
May I, please, have the achievable values for these parameters?
I bought from Mouser some Si8261ACC drivers, and I'm testing the first.
I feeded with 12.3 V, wich is 0.3 higher from 12 V UVLO, I feeded the simulated diode (pin 2) on input with 12 V signal from a button switch (same source) and limited current with 1.5 KOhms resistor in Cathode (pin 3), it doesn't do anything in response to change in pin2, then I changed resistor in pin 3 with a 1 K, now with 670 Ohms and the device doesn't do anything, no in the pin 3, neither in pin 6.. The output (pin 6) has a 1K resistor before a Led, which would receive the output at 12 V, but measuring in Cathode (pin 3) and here, there is no any change, so the simulated diode seems don't conduct. I'm afraid that if I put a lower resistance in pin 3 and then it conducts, the device become broken. Am I missing something or these devices doesn't work?
The device is feeded with 12.3 V in pin8 and ground in pin 5 by a PC power source.
I am looking at using the SI88242 device for an analogue sensing system. The IO requirements of both sides of the isolator are 3.3V, however the output side requires enough headroom in its isolated supply to allow for a low-noise LDO to be used - basically to get rid of the ~100mVpp ripple produced by the SI88242.
I would like to run the DC/DC converter at 5V - so feed 5V at the input side, and get 5V at the output side. This will allow me to nicely regulate the voltage down to 3.3V. However, driving all the supply pins of the SI88242 with 5V would require additional level shifting of the I/O signals that I would like to avoid. As such I would like to run the device with the following setup:
VDDP = 5V, with the transformer being fed with 5V.
VDDA = 3.3V (set IO voltage)
VSNS = Resistor divider of 49.9k and 13.3k to achieve an output voltage of 5V.
VDDB = 3.3V fed from an LDO.
I cannot tell from the datasheet whether this would be allowed, as all of the characteristics specify VDDP=VDDA, and it doesn't mention whether VDDB can be fed from an external voltage regulator.
I've attached a schematic of the planned power supply setup.
Could you confirm whether my proposed setup will not cause any issues for the SI88242?
I'm looking to isolate analogue and digital circuits with very low frequency signals - switches in fact. The Si8380 looks like it will potentially do the trick. I've used TI's digital isolators before and simply connected pins directly to other devices. So, for example, from a micro to an input pin of the isolator and an output pin directly to its destination device.
I'm not at all clear - and maybe I'm just being numb - whether I night need a series resistor from a micro to the input of the Si838x. The datasheet seems to be saying it works like an opto coupler, where you obviously need the resistor in series with the input. However, the datasheet shows a bridge rectifier on the the input, so I'm not at all clear what's going on there.
What about the outputs too? When I'm going the other way.from analogue domain to the micro, can I connect an analoguw signal directly to the input and then the output directly to the micro or do I need anything else on input or output.
I've Googled around for example real-world circuits and found the square root of nowt! :D
I designed AC and DC Load Switch with Si8752. AC switch is working well as expected. But high side DC load swtich is conducting even no input voltage. I tried it with FDMS1D4N03S mosfet. C4,R3 and D1 (TVS) are not populated on board during test. I tried miller capacitors seperately both of Source and Drain of the fet. I measured the gate voltage 0V in no control input and 10V in the control input on. But mosfet is conducting each situation ( control input on or off). How can I fix this issue?
I have a TTL circuit with 4 outputs which will handle 4 IGBTs,
I want to use Si826 AAC C IP dirvers between them, but datasheet says that I have to reach 5.6 V (maybe 6) when TTL outputs 4.8 or 5 V. Did Silicon Labs did a product specifically incompatible with TTL so I have to do the interface of the interface? Or there is a hint, a trick that makes it easy to interface TTL to this drivers? Or the input can be TTL while feeding has to be higher than 5.6 V?
It somebody has done it, can you share it please?
Luis J
Is there a pspice model (proteus) for Si826 AAC C IP?
We are planning on replacing digital isolators on a product range and need some guidance as to the suitability of the Si replacements. We have identified a couple of automotive approved parts as follows and would like confirmation that they are suitable for the stated isolation:
SELV to HV 400V Reinforced Isolation - Si8622ED-AS
SELV to HV 800V Reinforced Isolation - Si8622ET-AS
Please could you confirm that the parts selected are appropiate for the isolation requirements.
Also are both parts available with default output state low as there does not appear to be an option for this in table 1.2 of the datasheet?
I am using Si8431 isolator for my RS485 circuits. Sometimes Si8431 isolators are broken after a while. I mean it is gone! Maybe because of ESD or over current or something else. I m not sure why this happen. The datasheet of Si8431 is writing "Not recommended for new designs". Why is not it recommended? Does it have problem related my situation.
Can I use VDDA, VOA, GNDA for low side mosfet and VDDB, VOB, GNDB for hi side mosfet? Bootstrap diode will be connected to VDDB. Power suply +50V and -50V.
If yes, this is also true for Si 827x series?
Thanks!!!!
So, let me explain reasons.
I build full bridge class D power amp.
And will be good, if each half bridge will be mirrored to another half bridge on print board. It is possible if one Si8427 in normal connection to output mosfet, and another with mirrored.
Hi, I am interfacing a TI balance charger that will report status by SMBUS. It is running some high current motors in another section of the device and the charger is the central return for power/ground for all systems. The SMBUS is unpowered and I have SDA, SCL, and GND from the charger board going to my microcontroller. I am concerned about EMI reaching my microcontroller if I connected to the SMBUS directly. I am a little confused on the benefits of a fully isolated power supply, vs the practical EMI noise possible.
I was thinking of dropping the microcontroller system 3v3 to the VDD for the SMBUS side through a diode, maybe adding a bulk cap. This would then prevent any spikes returning into the microcontroller system and maybe help prevent significant surges from the charger. I know there are a lot of dumb isolation designs out there, but this one will sorta work I think. Am I taking crazy pills?
Forum
Si8751 missing specifications
I need the following specifications please for the Si8751 (I can't find these in the data sheet):
1) Worst case (min) over temperature current sinking capability (max output resistance) for the output driving the MOSFET gate low
2) Worst case (min) over temperature input resistance of the input pin
3) The output resistance for current sinking is not dependent on the TT pin - right?
- Thanks
Si8275 burned
Hello Silabs,
My application is 2MHz, 21kW, full bridge inverter, VDD<200V, SIC MOSFET C3M0065090D . SI8274 is used as an isolator, not drive SIC Mosfet directly. Input 5V 2MHz signal, then Si8274, each output of SI8274 is connected to each driver buffer IXDD614 before driving SIC MOSFET. All used isolated supply for gate drivers, +20V and +5V (attached picture): +20V to VDDA or VDDB; +5V to S of SIC mosfet
VDDI of SI8274 is 5V.
The problem is low side output of SI8274 frequently burned even it can be burned when there is no VDD suppy to MOSFET. Here are some cases I listed which burning occurs (only low side output of SI8274 is fired)
1. Isolated supplies 20V to VDDA, VDDB; 5V to S of SIC MOSFET; 5V to VDDI and EN pin (all supplied same time) no input signal
--> Sometimes, low side output VDDB, VOB, GNDB is burned even without 2MHz input
2. Isolated supplies 20V to VDDA, VDDB, 5V to S of SIC MOSFET --> then 5V to VDDI --> then input signal 2MHz --> 5V to EN pin
--> SI8274 burned ( low side output VDDB, VOB, GNDB)
3. Several cases by changing power supplies sequence or when output power is ~500W --> sometimes SI8274 is burned. I've tried to analyze it but didnt find out reason yet
Any advise for this issue
Please help me with Upper Channel Biasing
Hello everyone,
I am totally new to this forum looking for a help. Any tips and advice regarding my issue would be appreciated. I am jacksonlevi, working in a Corporate animation Company. I wanted to know that could the VDDA and GNDA actually be configured such that if, for example, a +15V/-5V bi-polar type biasing be fed into the chip and the source/emitter return of the device connected to separate neutral point?Or a different way could be that a 20V supply be placed between those pins, then using a secondary zener diode with resistors and capacitors create a +15V/-5V gate biasing ckt w/ a derived, floating source/emitter return point.Is there anything in the chip itself that would prevent negative biasing or reverse current flow? I have serached for this issue but did not find any right solution. Please help me
Any help would be greatly appreciated!!
Thank you.
Si8274: minimum PWM pulse width and maximum speed
There is no mention in the datasheet of these parameters. The only reference I can find is the 500kHz test for the PWM input to the EVAL board. I need to run the PWM input over 2MHz and the duty cycle needs to run as close to 0 and 100% as possible.
One could guess that the minimum pulse width corresponds to the prop delay plus a rise time (e.g., 30ns + 10.5ns = 40.5ns). To hit 5% duty factor, the PWM period would have to be at least 20 x 40.5ns = 810ns or a PWM frequency of 1.2MHz. If the minimum pulse period equals two prop delays plus a rise time and a fall time (e.g., 2x30ns + 10.5ns + 13.3ns = 83.8ns), then the typical maximum PWM frequency could be as high as 11.9MHz.
May I, please, have the achievable values for these parameters?
power up two sides of digital isolators with different voltages?
Si826 doesn't works?
I bought from Mouser some Si8261ACC drivers, and I'm testing the first.
I feeded with 12.3 V, wich is 0.3 higher from 12 V UVLO, I feeded the simulated diode (pin 2) on input with 12 V signal from a button switch (same source) and limited current with 1.5 KOhms resistor in Cathode (pin 3), it doesn't do anything in response to change in pin2, then I changed resistor in pin 3 with a 1 K, now with 670 Ohms and the device doesn't do anything, no in the pin 3, neither in pin 6.. The output (pin 6) has a 1K resistor before a Led, which would receive the output at 12 V, but measuring in Cathode (pin 3) and here, there is no any change, so the simulated diode seems don't conduct. I'm afraid that if I put a lower resistance in pin 3 and then it conducts, the device become broken. Am I missing something or these devices doesn't work?
The device is feeded with 12.3 V in pin8 and ground in pin 5 by a PC power source.
Luis
SI88242 Output Voltage Different to VDDB Voltage
I am looking at using the SI88242 device for an analogue sensing system. The IO requirements of both sides of the isolator are 3.3V, however the output side requires enough headroom in its isolated supply to allow for a low-noise LDO to be used - basically to get rid of the ~100mVpp ripple produced by the SI88242.
I would like to run the DC/DC converter at 5V - so feed 5V at the input side, and get 5V at the output side. This will allow me to nicely regulate the voltage down to 3.3V. However, driving all the supply pins of the SI88242 with 5V would require additional level shifting of the I/O signals that I would like to avoid. As such I would like to run the device with the following setup:
I cannot tell from the datasheet whether this would be allowed, as all of the characteristics specify VDDP=VDDA, and it doesn't mention whether VDDB can be fed from an external voltage regulator.
I've attached a schematic of the planned power supply setup.
Could you confirm whether my proposed setup will not cause any issues for the SI88242?
How to use Si838x devices. e.g. Do I need a series resistor between, say, a micro and an input pin?
Folks,
I'm looking to isolate analogue and digital circuits with very low frequency signals - switches in fact. The Si8380 looks like it will potentially do the trick. I've used TI's digital isolators before and simply connected pins directly to other devices. So, for example, from a micro to an input pin of the isolator and an output pin directly to its destination device.
I'm not at all clear - and maybe I'm just being numb - whether I night need a series resistor from a micro to the input of the Si838x. The datasheet seems to be saying it works like an opto coupler, where you obviously need the resistor in series with the input. However, the datasheet shows a bridge rectifier on the the input, so I'm not at all clear what's going on there.
What about the outputs too? When I'm going the other way.from analogue domain to the micro, can I connect an analoguw signal directly to the input and then the output directly to the micro or do I need anything else on input or output.
I've Googled around for example real-world circuits and found the square root of nowt! :D
Many thanks,
Rob
Si8752 High Side Configuration
Hi,
I designed AC and DC Load Switch with Si8752. AC switch is working well as expected. But high side DC load swtich is conducting even no input voltage. I tried it with FDMS1D4N03S mosfet. C4,R3 and D1 (TVS) are not populated on board during test. I tried miller capacitors seperately both of Source and Drain of the fet. I measured the gate voltage 0V in no control input and 10V in the control input on. But mosfet is conducting each situation ( control input on or off). How can I fix this issue?
Best regards,
TTL & Si826 AAC C IP incompatible by design?
I have a TTL circuit with 4 outputs which will handle 4 IGBTs,
I want to use Si826 AAC C IP dirvers between them, but datasheet says that I have to reach 5.6 V (maybe 6) when TTL outputs 4.8 or 5 V. Did Silicon Labs did a product specifically incompatible with TTL so I have to do the interface of the interface? Or there is a hint, a trick that makes it easy to interface TTL to this drivers? Or the input can be TTL while feeding has to be higher than 5.6 V?
It somebody has done it, can you share it please?
Luis J
Is there a pspice model (proteus) for Si826 AAC C IP?
Part Number Suffix
Hi,
I have a gate driver component, with a different suffix but I dont find anywhere what is the actual difference, and what does the suffix mean.
My components are the following:
SI8423AD-B-IS
SI8423AD-D-IS
Si8622 Reinforced Isolation
Hi
We are planning on replacing digital isolators on a product range and need some guidance as to the suitability of the Si replacements. We have identified a couple of automotive approved parts as follows and would like confirmation that they are suitable for the stated isolation:
SELV to HV 400V Reinforced Isolation - Si8622ED-AS
SELV to HV 800V Reinforced Isolation - Si8622ET-AS
Please could you confirm that the parts selected are appropiate for the isolation requirements.
Also are both parts available with default output state low as there does not appear to be an option for this in table 1.2 of the datasheet?
Kind regards
Miz
Si8431 is broken
Hi,
I am using Si8431 isolator for my RS485 circuits. Sometimes Si8431 isolators are broken after a while. I mean it is gone! Maybe because of ESD or over current or something else. I m not sure why this happen. The datasheet of Si8431 is writing "Not recommended for new designs". Why is not it recommended? Does it have problem related my situation.
Thanks!
Mehmet
Si8244 change output
Hi!!!
Can I use VDDA, VOA, GNDA for low side mosfet and VDDB, VOB, GNDB for hi side mosfet? Bootstrap diode will be connected to VDDB. Power suply +50V and -50V.
If yes, this is also true for Si 827x series?
Thanks!!!!
So, let me explain reasons.
I build full bridge class D power amp.
And will be good, if each half bridge will be mirrored to another half bridge on print board. It is possible if one Si8427 in normal connection to output mosfet, and another with mirrored.
Si8600 with unpowered SMBUS
Hi, I am interfacing a TI balance charger that will report status by SMBUS. It is running some high current motors in another section of the device and the charger is the central return for power/ground for all systems. The SMBUS is unpowered and I have SDA, SCL, and GND from the charger board going to my microcontroller. I am concerned about EMI reaching my microcontroller if I connected to the SMBUS directly. I am a little confused on the benefits of a fully isolated power supply, vs the practical EMI noise possible.
I was thinking of dropping the microcontroller system 3v3 to the VDD for the SMBUS side through a diode, maybe adding a bulk cap. This would then prevent any spikes returning into the microcontroller system and maybe help prevent significant surges from the charger. I know there are a lot of dumb isolation designs out there, but this one will sorta work I think. Am I taking crazy pills?