can i know the FIT Rate(failure in time) / MTBF value of Si5341A-D-GM. Please do share as soon as possible.
Hello, typically LVPECL needs DC-connected resistors to a termination voltage for LVPECL outputs at the driver end but these are not mentioned in the datasheet or family reference manual. Are they required or not? The LVDS/LVPECL diagram in the reference manual (figure 6.1) suggests they are not required but if this is the case then it should perhaps be clarified? Or perhaps I should add them to my design just in case...
We recently bouth another part of 10 units from Digikey and two of them acting same weird way. After being heated up they are working great, when cooled down output chaacteristics is distored.
Is case already known for you? All devices were applied on the PCB by machine soldering in same conditions. Moreover we already bought around 30 devices so far and all of them were working great. One device could be forgotten, but two of them acting same way is leading us to the situation, tha it might occur in the future and cosidering cost of the chip it is quite unacceptable.
Can we send devices to you for investigation?
I'm not sure which Architecture am I supposed to use with the following setup:
The PCIe Clock source is an Intel SoC (Intel® Xeon® Processor D-1500) - which is PCIe Device A. PCIe device B gets the REFCLK from the SoC.
Which Clock Architecture am I supposed to use in the tool? I think that I should use the Common RefClk Architecture. I assume that the RefClk output is shared with the PCIe Device A within the SoC.
I would like to use the embedded crystal. In clock builder pro I chose the SI5332-GM3, but I dont see the option to chose internal crystal, the tool let me chose only external clock inputs.
I am using an SI5332AC - GM2 and would like a 10MHz clock on OUT6 and the invert of the clock on OUT6b. Is this possible? In looking at the Si5332 Reference Manual, seems to imply it is. If I set OUT6_CMOS_INV = 1, then it says OUT6b inverted. I assume that OUT6 will not be inverted. Am I reading this correctly?
Thanks for the help on this.
I can not get any frequencies higher than 140MHz from the Si514. The datasheet says is can go to 250MHz and the settings table has examples for 150MHz and up. Even using the 150MHz settings from the table I get no response after programming. I can read back the registers and see that they are configured properly. I also get correct frequency output at several rates 140MHz and below.
The only difference between the 140MHz and 160MHz settings is the high speed divider setting. But still somehow 140MHz ouputs a clock and 160MHz outputs nothing.
I have increased the time after the calibration command and even sent the output enable command twice. Nothing seems to help.
Do these symptoms sound familiar at all? Any ideas for other things to look at?
Hi Hary / Tim ,
about the BW for messuring:
you said that need at least 5 Ghz,
it's seems so high, the carrier is just 100 Mhz.
what is the explanation with this requirement ?
I've build a small clock generator module around Si5351A-B-GMR (QFN-20 package, top marking Si5351 B00E09 1608), that makes all 8 clock outputs available. But I am having a problem with generating correct frequencies on outputs CLK0 thru CLK5.
I can program the chip over I2C just fine, but the output frequencies on CLK0 thru CLK5 are all roughly 1.5X higher than they should be. BUT Output frequencies (integer div) on CLK6 and CLK7 are correct. I have also mirrored the xtal oscilator (X0) to CLK1 to check the oscillator frequency, and it is running at a solid 25.000 MHz. (I am using a 25 MHz Abracon ABM8G-25.000MHZ-B4Y-T crystal. All components were purchased from Mouser.)
My original prototyping work was done with the Adafruit Si5351A Clock Generator Breakout Board, which has an Si5351A-B-GT (MSOP-10 package, top marking 5351 B600 507). This board only had 3 outputs, but it generates the correct frequencies. I thought it would be a simple matter to substitute Si5351A-B-GM, but the lower 6 outputs are not generating the same frequencies as I can get on the Si5351A-B-GT with the same register settings.
For what it's worth, I was originally programming this from an Arduino using Adafruit's own Si5351 library (which only supports the first 3 outputs). Wrong frequencies. I then switched to EtherKit/Si5351Arduino (which supports all 8 outputs), but I still get the wrong frequencies on CLK0 thru CLK5. I'm definitely initializing the libraries for a 25 MHz crystal, too, unless there is some bug in the library code that affects Si5351A-B-GM but not Si5351A-B-GT.
THIS SEEMS VERY STRANGE.
Is there something different about the multisynth architecture or programming between Si5351A-B-GT and Si5351A-B-GM? Hopefully this is something I can easily fix in code.
I decided to try using different combinations of PLLA and PLLB and the various multisynths/outputs. This is what I discovered:
Both PLLs are supposedly programmed for 800 MHz. PLLB appears to be very stable. PLLA appears to be relatively unstable, producing ultimate output frequencies that vary by ±0.1%.
When using PLLB, CLK0 thru CLK5 produce frequencies that are that are approximately 1.1X higher than what they should be. CLK6 and CLK7 produce correct frequencies.
When using PLLA, CLK0 thru CLK5 produce frequencies that are that are approximately 1.5X higher than what they should be, and unstable. CLK6 and CLK7 produce frequencies that are that are approximately 1.355X higher than what they should be.
Mirroring the crystal oscillator to a CLK pin produces the correct, stable, 25.000 MHz frequency output on that pin in all cases.
My conclusion is that there is something wrong with the multisynth math on MS0 thru MS5, and something very wrong with PLLA.
We need tape and reel packaging spec for part# Si53301-B-GMR, can you pls advise. Thanks.
Now,I have two module must synchornized to a 50 MHz clock source,just like below:
The sinwave is ocassionaly removed one cycle leaved high level , and two high level interval lager than 1s.
then this signal will be recoverd by two Si5317, and my question is :the two recoverd sigal is same,if not same,what the different?