Pearl Gecko Common Specs
- ARM Cortex-M4 CPU platform
- 40 MHz
- Up to 1024 kB Flash
- Up to 256 kB RAM
- 64 μA/MHz in Active Mode (EM0)
- 2.1 μA sleep with RTC and RAM retention
- Autonomous peripherals in sleep
- DMA and peripheral reflex system
- LESENSE
- USART, I²C, and SPI
- Up to 65 General Purpose I/O Pins
- -40 °C to +85 °C TJ operation range
- 1.8 V to 3.8 V single power supply
- Packages:
- 32-pin QFN (5 mm x 5 mm)
- 48-pin QFN (7 mm x 7 mm)
- 125-pin BGA (7 mm x 7 mm)
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| Part Number | MHz | Flash (kB) | RAM (kB) | Dig I/O Pins | 5 Volt Tolerant | ADC 1 | DAC | USB | Cap Sense | LCD | Temp Sensor | Timers (16-bit) | UART | USART | SPI | I2C | I2S | EMIF | RTC | Comparators | Vdd (min) | Vdd (max) | Package Type | Package Size (mm) | Internal Osc. | Debug Interface | Cryptography | CRYOTIMER | LETIMER | Op-Amp | sl:pcntchannels | Timers (32-bit) | DC-DC | LESENSE | Temperature Range (ºC) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 40 | 1024 | 256 | 65 | 12-bit, 54-ch., 1 Msps | 2x 12-bit, 54-ch., 500 ksps | 2 | 0 | 4 | 4 | 2 | 2 | 0 | 2 | 1.8 | 3.8 | BGA125 | 7x7 | ±2% | JTAG; SW; ETM | AES-128 AES-256 ECC SHA-1 SHA-2 TRNG SMU | 1 | 1 | 3 | 3 | 2 | -40 85 | |||||||||
| 40 | 1024 | 256 | 33 | 12-bit, 33-ch., 1 Msps | 2x 12-bit, 33-ch., 500 ksps | 2 | 0 | 4 | 4 | 2 | 2 | 0 | 2 | 1.8 | 3.8 | QFN48 | 7x7 | ±2% | JTAG; SW; ETM | AES-128 AES-256 ECC SHA-1 SHA-2 TRNG SMU | 1 | 1 | 3 | 3 | 2 | -40 85 | |||||||||
| 40 | 1024 | 256 | 65 | 12-bit, 54-ch., 1 Msps | 2x 12-bit, 54-ch., 500 ksps | 2 | 0 | 4 | 4 | 2 | 2 | 0 | 2 | 1.8 | 3.8 | BGA125 | 7x7 | ±2% | JTAG; SW; ETM | AES-128 AES-256 ECC SHA-1 SHA-2 TRNG SMU | 1 | 1 | 3 | 3 | 2 | -40 125 | |||||||||
| 40 | 1024 | 256 | 33 | 12-bit, 33-ch., 1 Msps | 2x 12-bit, 33-ch., 500 ksps | 2 | 0 | 4 | 4 | 2 | 2 | 0 | 2 | 1.8 | 3.8 | QFN48 | 7x7 | ±2% | JTAG; SW; ETM | AES-128 AES-256 ECC SHA-1 SHA-2 TRNG SMU | 1 | 1 | 3 | 3 | 2 | -40 125 | |||||||||
| 40 | 128 | 32 | 24 | 12-bit, 24-ch., 1 Msps | — | 2 | 0 | 2 | 2 | 1 | 1 | 0 | 2 | 1.85 | 3.8 | QFN32 | 5x5 | ±2% | JTAG; SW | AES-128 AES-256 ECC SHA-1 SHA-2 | 1 | 1 | 0 | 1 | 0 | -40 85 | |||||||||
| 40 | 256 | 32 | 24 | 12-bit, 24-ch., 1 Msps | — | 2 | 0 | 2 | 2 | 1 | 1 | 0 | 2 | 1.85 | 3.8 | QFN32 | 5x5 | ±2% | JTAG; SW | AES-128 AES-256 ECC SHA-1 SHA-2 | 1 | 1 | 0 | 1 | 0 | -40 85 | |||||||||
| 40 | 256 | 32 | 24 | 12-bit, 24-ch., 1 Msps | — | 2 | 0 | 2 | 2 | 1 | 1 | 0 | 2 | 1.85 | 3.8 | QFN32 | 5x5 | ±2% | JTAG; SW | AES-128 AES-256 ECC SHA-1 SHA-2 | 1 | 1 | 0 | 1 | 0 | -40 125 | |||||||||
| 40 | 128 | 32 | 20 | 12-bit, 20-ch., 1 Msps | — | 2 | 0 | 2 | 2 | 1 | 1 | 0 | 2 | 1.85 | 3.8 | QFN32 | 5x5 | ±2% | JTAG; SW | AES-128 AES-256 ECC SHA-1 SHA-2 | 1 | 1 | 0 | 1 | 0 | -40 85 | |||||||||
| 40 | 128 | 32 | 32 | 12-bit, 24-ch., 1 Msps | — | 2 | 0 | 2 | 2 | 1 | 1 | 0 | 2 | 1.85 | 3.8 | QFN48 | 7x7 | ±2% | JTAG; SW | AES-128 AES-256 ECC SHA-1 SHA-2 | 1 | 1 | 0 | 1 | 0 | -40 85 | |||||||||
| 40 | 256 | 32 | 20 | 12-bit, 20-ch., 1 Msps | — | 2 | 0 | 2 | 2 | 1 | 1 | 0 | 2 | 1.85 | 3.8 | QFN32 | 5x5 | ±2% | JTAG; SW | AES-128 AES-256 ECC SHA-1 SHA-2 | 1 | 1 | 0 | 1 | 0 | -40 85 | |||||||||
| 40 | 256 | 32 | 32 | 12-bit, 24-ch., 1 Msps | — | 2 | 0 | 2 | 2 | 1 | 1 | 0 | 2 | 1.85 | 3.8 | QFN48 | 7x7 | ±2% | JTAG; SW | AES-128 AES-256 ECC SHA-1 SHA-2 | 1 | 1 | 0 | 1 | 0 | -40 85 | |||||||||
| 40 | 256 | 32 | 20 | 12-bit, 20-ch., 1 Msps | — | 2 | 0 | 2 | 2 | 1 | 1 | 0 | 2 | 1.85 | 3.8 | QFN32 | 5x5 | ±2% | JTAG; SW | AES-128 AES-256 ECC SHA-1 SHA-2 | 1 | 1 | 0 | 1 | 0 | -40 125 | |||||||||
| 40 | 256 | 32 | 32 | 12-bit, 24-ch., 1 Msps | — | 2 | 0 | 2 | 2 | 1 | 1 | 0 | 2 | 1.85 | 3.8 | QFN48 | 7x7 | ±2% | JTAG; SW | AES-128 AES-256 ECC SHA-1 SHA-2 | 1 | 1 | 0 | 1 | 0 | -40 125 |
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EFM32 Pearl Gecko PG12 Starter Kit
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The SLSTK3402A Pearl Gecko PG12 starter kit enables customers to jumpstart their evaluation and development of both EFM32 Pearl Gecko PG12 and EFM32 Jade Gecko JG12 based products.