EFR32FG1 Common Specs
2.4 GHz Radio
- Integrated 2.4 GHz BALUN & Power Amplifier
- Excellent Receive Sensitivity:
- -103.3 dBm @125 kbps, GFSK
- -103.3 dBm @250 kbps, DSSS-OQPSK
- Programmable Output Power: +19.5 dBm
- Active-mode RX: 8.8 mA @1 Mbps, 2 GFSK
- Active-mode TX:
- 8.5 mA @0 dBm
- 34 mA @10.5 dBm
- Low Power Radio features RFSENSE (51 nA)
- Antenna Diversity
Sub-GHz Radio
- Ideal for proprietary protocols, wireless M-BUS, Low Power Wide Area Network applications
- Supported Modulations: 2/4 (G)FSK, OQPSK/(G)MSK, OOK/ASK, BPSK/DBPSK
- Optional DSSS modulation technique and FEC channel coding
- Excellent Receive Sensitivity:
- -126.4 dBm @600 bps, GFSK, 915 MHz
- -121.4 dBm @2.4 kbps, GFSK, 868 MHz
- -107 dBm @4.8 kbps, OOK, 433 MHz
- -111.9 dBm @38.4 kbps, GFSK, 169 MHz
- Programmable Output Power: +20 dBm
- Active-mode RX: 8.1 mA @38.4 kbps, 2GFSK
- Active-mode TX:
- 19.5 mA @10 dBm, 433 MHz
- 34.5 mA @14 dBm, 868 MHz
- Antenna Diversity
Rich Analog and Digital Peripherals
- AES-256/128 Hardware Crypto Accelerator with ECC, SHA-1, SHA-2
- ADC (12-bit, 1 Msps, 270 µA)
- Current DAC (4-bit, Current Source or Sink)
- Up to 2 X Voltage DAC
- Up to 3 X Operational Amplifier
- Low Energy Sensor Interface (select devices)
- Multi-channel Capacitive Sense Interface (select devices)
- 2 X Analog Comparator
- Low Energy UART
- 2 x USART (UART, SPI, IrDA, I²S)
- I²C (Address recognition down to EM3)
- Timers: RTCC, LE Timer & Pulse Counter
- 12-channel Peripheral Reflex System
- Up to 32 GPIO
Energy Efficient Low Power Modes
- Energy Mode 2 (Deep Sleep) Current: 2.2 µA
- Ultra-fast wake up: 3 µS from EM3
- Wide Supply Voltage range of 1.85 to 3.8 V
Powerful MCU & Memory Options
- ARM® Cortex®-M4 + Floating-Point Unit
- Up to 40 MHz Clock Speed
- Low Active Mode Current: 63 µA/MHz
- Up to 256 kB of Programmable Flash
- Up to 32 kB RAM
Package Options
- QFN48 (7x7 mm)
- QFN32 (5x5 mm)
Find the Right EFR32FG1 Device
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Part Number | Pricing | Integrated MCU | MCU Core | Core Frequency (MHz) | Flash | RAM | Communications | Output Power (dBm) | RX Current (mA) | Receive Sensitivity (dBm) | TX Current A | TX Current A (dBm) | TX Current B | TX Current B (dBm) | Proprietary 2.4 GHz | Proprietary Sub-GHz | Cryptography | Dig I/O Pins | ADC-1 | DAC | Cap Sense | Temp Sensor | Timers (16-bit) | RTC | Comparators | Temperature Range ºC | Package Type | Package Size (mm) | Debug Interface |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1K @ US$4.68 | ARM Cortex-M4 | 40 | 128 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.83 | ARM Cortex-M4 | 40 | 128 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.96 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$5.09 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 32 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$6.15 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 87 | 20 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 125 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$6.28 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | — | — | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 125 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.43 | ARM Cortex-M4 | 40 | 64 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.57 | ARM Cortex-M4 | 40 | 64 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.69 | ARM Cortex-M4 | 40 | 128 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 19.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 133 | 19.5 | 8.8 | 0 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.83 | ARM Cortex-M4 | 40 | 128 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 19.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 133 | 19.5 | 8.8 | 0 | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.96 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 19.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 133 | 19.5 | 8.8 | 0 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$5.09 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 19.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 133 | 19.5 | 8.8 | 0 | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.44 | ARM Cortex-M4 | 40 | 64 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 19.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 133 | 19.5 | 8.8 | 0 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.57 | ARM Cortex-M4 | 40 | 64 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 19.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 133 | 19.5 | 8.8 | 0 | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$5.59 | ARM Cortex-M4 | 40 | 128 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz); -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 126.7 | 19.5 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 28 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$5.87 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz); -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 126.7 | 19.5 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$5.33 | ARM Cortex-M4 | 40 | 64 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 20 | 8.1 | -126.4 (600 bps GFSK 915 MHz); -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 126.7 | 19.5 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.32 | ARM Cortex-M4 | 40 | 128 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.47 | ARM Cortex-M4 | 40 | 128 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.71 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.85 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 32 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.05 | ARM Cortex-M4 | 40 | 32 | 8 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.2 | ARM Cortex-M4 | 40 | 32 | 8 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 ECC SHA-1 SHA-2 | 32 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.17 | ARM Cortex-M4 | 40 | 64 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.1 | -121 dBm (2.4 kbps 2 GFSK 0.1% BER) | 0 | 0 | 87 | 20 | AES-128 AES-256 SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.32 | ARM Cortex-M4 | 40 | 64 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.1 | -126.4 (600 bps GFSK 915 MHz) | 0 | 0 | 87 | 20 | AES-128 AES-256 SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.32 | ARM Cortex-M4 | 40 | 128 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 88 | 16.5 | 34.1 | 10.5 | AES-128 AES-256 SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.47 | ARM Cortex-M4 | 40 | 128 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 88 | 16.5 | 34.1 | 10.5 | AES-128 AES-256 SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.73 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 88 | 16.5 | 34.1 | 10.5 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.85 | ARM Cortex-M4 | 40 | 256 | 32 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 88 | 16.5 | 34.1 | 10.5 | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.05 | ARM Cortex-M4 | 40 | 32 | 8 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 88 | 16.5 | 34.1 | 10.5 | AES-128 AES-256 ECC SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.2 | ARM Cortex-M4 | 40 | 32 | 8 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 88 | 16.5 | 34.1 | 10.5 | AES-128 AES-256 ECC SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW | |||||||
1K @ US$4.2 | ARM Cortex-M4 | 40 | 64 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 88 | 16.5 | 34.1 | 10.5 | AES-128 AES-256 SHA-1 SHA-2 | 16 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN32 | 5x5 | JTAG, SW | |||||||
1K @ US$4.32 | ARM Cortex-M4 | 40 | 64 | 16 | 1 x I²C 1 x I²S 2 x SPI 3 x UART 2 x USART | -30 16.5 | 8.7 | -99 (250 kbps DSSS-OQPSK 2.4 GHz) | 88 | 16.5 | 34.1 | 10.5 | AES-128 AES-256 SHA-1 SHA-2 | 31 | 12-bit, SAR, 1 Msps | iDAC | 7 | 2 | -40 85 | QFN48 | 7x7 | JTAG, SW |
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Featured Kits
EFR32FG 169 MHz 2.4 GHz and Sub-GHz Starter Kit
The EFR32FG 169 MHz 2.4 GHz and Sub-GHz Wireless SoC Starter Kit can be used in conjunction with the Connect SDK and Radio Abstraction Interface Layer (RAIL) SDK to simplify proprietary wireless protocol development. Sample applications, including the popular range test, are included with the SDK.
EFR32FG 169 MHz 2.4 GHz and Sub-GHz Starter Kit
The EFR32FG 169 MHz 2.4 GHz and Sub-GHz Wireless SoC Starter Kit can be used in conjunction with the Connect SDK and Radio Abstraction Interface Layer (RAIL) SDK to simplify proprietary wireless protocol development. Sample applications, including the popular range test, are included with the SDK.
EFR32FG 434 MHz 2.4 GHz and Sub-GHz Starter Kit
The EFR32FG 434 MHz 2.4 GHz and Sub-GHz Wireless SoC Starter Kit can be used in conjunction with the Connect SDK and Radio Abstraction Interface Layer (RAIL) SDK to simplify proprietary wireless protocol development. Sample applications, including the popular range test, are included with the SDK.
EFR32FG 434 MHz 2.4 GHz and Sub-GHz Starter Kit
The EFR32FG 434 MHz 2.4 GHz and Sub-GHz Wireless SoC Starter Kit can be used in conjunction with the Connect SDK and Radio Abstraction Interface Layer (RAIL) SDK to simplify proprietary wireless protocol development. Sample applications, including the popular range test, are included with the SDK.
EFR32FG 490 MHz 2.4 GHz and Sub-GHz Starter Kit
The EFR32FG 490 MHz 2.4 GHz and Sub-GHz Wireless SoC Starter Kit can be used in conjunction with the Connect SDK and Radio Abstraction Interface Layer (RAIL) SDK to simplify proprietary wireless protocol development. Sample applications, including the popular range test, are included with the SDK.
EFR32FG 490 MHz 2.4 GHz and Sub-GHz Starter Kit
The EFR32FG 490 MHz 2.4 GHz and Sub-GHz Wireless SoC Starter Kit can be used in conjunction with the Connect SDK and Radio Abstraction Interface Layer (RAIL) SDK to simplify proprietary wireless protocol development. Sample applications, including the popular range test, are included with the SDK.
EFR32FG 868 MHz 2.4 GHz and Sub-GHz Starter Kit
The EFR32FG 868 MHz 2.4 GHz and Sub-GHz Wireless SoC Starter Kit can be used in conjunction with the Connect SDK and Radio Abstraction Interface Layer (RAIL) SDK to simplify proprietary wireless protocol development. Sample applications, including the popular range test, are included with the SDK.
EFR32FG 868 MHz 2.4 GHz and Sub-GHz Starter Kit
The EFR32FG 868 MHz 2.4 GHz and Sub-GHz Wireless SoC Starter Kit can be used in conjunction with the Connect SDK and Radio Abstraction Interface Layer (RAIL) SDK to simplify proprietary wireless protocol development. Sample applications, including the popular range test, are included with the SDK.
EFR32FG 915 MHz 2.4 GHz and Sub-GHz Starter Kit
The EFR32FG 915 MHz 2.4 GHz and Sub-GHz Wireless SoC Starter Kit can be used in conjunction with the Connect SDK and Radio Abstraction Interface Layer (RAIL) SDK to simplify proprietary wireless protocol development. Sample applications, including the popular range test, are included with the SDK.
EFR32FG 915 MHz 2.4 GHz and Sub-GHz Starter Kit
The EFR32FG 915 MHz 2.4 GHz and Sub-GHz Wireless SoC Starter Kit can be used in conjunction with the Connect SDK and Radio Abstraction Interface Layer (RAIL) SDK to simplify proprietary wireless protocol development. Sample applications, including the popular range test, are included with the SDK.
EFR32FG1 2.4 GHz and 490 MHz Radio Board
The EFR32FG1 SLWRB4251A radio board supports dual-band operation with sub-GHz operation in the US FCC 490 MHz band with an external whip antenna and 2.4 GHz operation at the 2400-2483.5 MHz band with the on-board printed antenna.
EFR32FG1 2.4 GHz and 490 MHz Radio Board
The EFR32FG1 SLWRB4251A radio board supports dual-band operation with sub-GHz operation in the US FCC 490 MHz band with an external whip antenna and 2.4 GHz operation at the 2400-2483.5 MHz band with the on-board printed antenna.
EFR32FG1 2.4 GHz and 868 MHz Radio Board
The EFR32FG1 SLWRB4250B radio board supports dual-band operation with sub-GHz operation in the US FCC 868 MHz band with an external whip antenna and 2.4 GHz operation at the 2400-2483.5 MHz band with the on-board printed antenna.
EFR32FG1 2.4 GHz and 868 MHz Radio Board
The EFR32FG1 SLWRB4250B radio board supports dual-band operation with sub-GHz operation in the US FCC 868 MHz band with an external whip antenna and 2.4 GHz operation at the 2400-2483.5 MHz band with the on-board printed antenna.
EFR32FG1 2.4 GHz and 915 MHz Radio Board
The EFR32FG1 SLWRB4250A radio board supports dual-band operation with sub-GHz operation in the US FCC 915 MHz band with an external whip antenna and 2.4 GHz operation at the 2400-2483.5 MHz band with the on-board printed antenna.
EFR32FG1 2.4 GHz and 915 MHz Radio Board
The EFR32FG1 SLWRB4250A radio board supports dual-band operation with sub-GHz operation in the US FCC 915 MHz band with an external whip antenna and 2.4 GHz operation at the 2400-2483.5 MHz band with the on-board printed antenna.
EFR32FG1 2.4 GHz and 434 MHz Radio Board
The EFR32FG1 SLWRB4251B radio board supports dual-band operation with sub-GHz operation in the US FCC 434 MHz band with an external whip antenna and 2.4 GHz operation at the 2400-2483.5 MHz band with the on-board printed antenna.
EFR32FG1 2.4 GHz and 434 MHz Radio Board
The EFR32FG1 SLWRB4251B radio board supports dual-band operation with sub-GHz operation in the US FCC 434 MHz band with an external whip antenna and 2.4 GHz operation at the 2400-2483.5 MHz band with the on-board printed antenna.