IoT security is key to protecting company brands, end user privacy and commercial viability of products. Vulnerabilities can be exploited through both remote Internet attacks and physical hands-on-attacks.
Developers using the Silicon Labs wireless product portfolio including those in the EFR32PG22 portfolio have access to a number of technologies designed to protect their product, including Secure Debug, Secure Boot with Root of Trust & Secure Loader.
Part Number | MHz | Flash | RAM | Dig I/O Pins | Security | ADC 1 | USB | Temp Sensor | UART | RTC | Package Type | Package Size (mm) | Internal Osc. | Debug Interface | Cryptography |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
76 | 128 | 32 | 18 | Secure Boot with RTSL | 12-bit, 12-ch., 1 Msps | 3 | QFN32 | 4 x 4 | 2% | Secure; SW; ETM | AES-1 AES-256 ECC SHA-1 SHA-2 | ||||
76 | 128 | 32 | 26 | Secure Boot with RTSL | 12-bit, 12-ch., 1 Msps | 3 | QFN40 | 5 x 5 | 2% | Secure; SW; ETM | AES-1 AES-256 ECC SHA-1 SHA-2 | ||||
76 | 256 | 32 | 18 | Secure Boot with RTSL | 12-bit, 12-ch., 1 Msps | 3 | QFN32 | 4 x 4 | 2% | Secure; SW; ETM | AES-1 AES-256 ECC SHA-1 SHA-2 | ||||
76 | 256 | 32 | 18 | Secure Boot with RTSL | 12-bit, 12-ch., 1 Msps | 3 | QFN40 | 5 x 5 | 2% | Secure; SW; ETM | AES-1 AES-256 ECC SHA-1 SHA-2 | ||||
76 | 512 | 32 | 18 | Secure Boot with RTSL | 12-bit, 12-ch., 1 Msps | 3 | QFN32 | 4 x 4 | 2% | Secure; SW; ETM | AES-1 AES-256 ECC SHA-1 SHA-2 | ||||
76 | 512 | 32 | 26 | Secure Boot with RTSL | 12-bit, 12-ch., 1 Msps | 3 | QFN40 | 5 x 5 | 2% | Secure; SW; ETM | AES-1 AES-256 ECC SHA-1 SHA-2 | ||||
76 | 64 | 32 | 18 | Secure Boot with RTSL | 12-bit, 12-ch., 1 Msps | 3 | QFN32 | 4 x 4 | 2% | Secure; SW; ETM | AES-1 AES-256 ECC SHA-1 SHA-2 | ||||
76 | 64 | 32 | 26 | Secure Boot with RTSL | 12-bit, 12-ch., 1 Msps | 3 | QFN40 | 5 x 5 | 2% | Secure; SW; ETM | AES-1 AES-256 ECC SHA-1 SHA-2 |